
MOTOROLA
Page viii
MC68HC05C0 Specification Rev. 1.2
Figure 11-1
Timer Block Diagram ......................................................................... 54
Figure 11-2
Timer Counter MSB Register............................................................. 55
Figure 11-3
Timer Counter LSB Register.............................................................. 55
Figure 11-4
Timer Alternate Counter MSB Register ............................................. 55
Figure 11-5
Timer Alternate Counter LSB Register .............................................. 55
Figure 11-6
Timer Output Compare MSB Register ............................................... 56
Figure 11-7
Timer Output Compare LSB Register ................................................ 56
Figure 11-8
Timer Input Capture MSB Register.................................................... 57
Figure 11-9
Timer Input Capture LSB Register..................................................... 57
Figure 11-10
Timer Control Register........................................................................ 57
Figure 11-11
Timer Status Register ......................................................................... 59
Figure 12-1
Data Format ........................................................................................ 62
Figure 12-2
SCI Block Diagram.............................................................................. 64
Figure 12-3
SCI Examples of Start Bit Recognition Technique.............................. 66
Figure 12-4
SCI Sampling Technique Used on all Bits .......................................... 66
Figure 12-5
SCI Artificial Start Following a Framing Error ..................................... 67
Figure 12-6
SCI Start Bit Following a Break........................................................... 68
Figure 12-7
Serial Communications Data Register ................................................ 69
Figure 12-8
Serial Communications Control Register ............................................ 69
Figure 12-9
SCI Data Clock Timing Diagram (M=0) .............................................. 73
Figure 12-10
SCI Data Clock Timing Diagram (M=1) .............................................. 73
Figure 12-11
Serial Communications Control Register 2 ......................................... 74
Figure 12-12
Serial Communications Status Register ............................................. 76
Figure 12-13
Serial Communications Baud Rate Register....................................... 78
Figure 12-14
SCI Rate Generator Block Diagram.................................................... 81