參數(shù)資料
型號(hào)： MC68302PV33C
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 4 CHANNEL(S), 10M bps, LOCAL AREA NETWORK CONTROLLER, PQFP144
封裝： 20 X 20 MM, 1.40 MM HEIGHT, 0.50 MM PITCH, PLASITC, LQFP-144
文件頁數(shù)： 48/128頁
文件大小： 641K
代理商： MC68302PV33C
MC68EN302 Module Bus Controller
MOTOROLA
MC68EN302 REFERENCE MANUAL
2-9
2.9.1 Bus Cycle Timing
The 8-bit extension logic for dynamic sizing is programmable from -1 to 5 wait states, and
allows the external logic to terminate the cycle. Even word accesses are a special case
which require specific control operations to allow the device to provide two external bus
cycles. In some cases, the timing generated looks like two comparable 68000 cycles.There
are two exceptions to this. First, the -1 wait state timing is a special case, since the 68000
bus is defined as a minimum 4 clock bus. The second exception is the Fast Cycle case. The
-1 wait state case appears externally as two 16-bit 3 clock bus cycles. Figure 2-4 shows the
timing for the read case, while Figure 2-5 shows the timing for writes.
Figure 2-4. Word Read with 3-Clock 8-Bit Accesses
Figure 2-5. Word Write with 3-Clock 8-Bit Accesses
The fast cycle case differs from the normal cycle in that AS and chip select do not negate
between the first and second half of the 16-bit access, allowing the two bus cycles to be
S2
S3
S4
S5
S0
S1
CLOCK
S0
S1
S2
S3
S4
S5
ADDR23-1
ADDR0
AS/CS
RW
DATA
UDS/LDS
S2
S3
S4
S5
S0
S1
CLOCK
S0
S1
S2
S3
S4
S5
ADDR23-1
ADDR0
AS/CS
RW
DATA
UDS/LDS
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MC68302RC20 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:Integrated Multiprotocol Processor User’s Manual
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MC68302RC25 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:Integrated Multiprotocol Processor User’s Manual
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