參數(shù)資料
型號: MC56F8355VFG60
廠商: MOTOROLA INC
元件分類: 數(shù)字信號處理
英文描述: 4-BIT, 120 MHz, OTHER DSP, PQFP128
封裝: LQFP-128
文件頁數(shù): 69/152頁
文件大小: 2224K
代理商: MC56F8355VFG60
56F8355 Signal Pins
56F8355 Technical Data
23
Preliminary
PHASEB1
(TB1)
(MOSI1)
(GPIOC1)
10
Schmitt
Input
Schmitt
Input/
Output
Schmitt
Input/
Output
Schmitt
Input/
Output
Input
Phase B1 — Quadrature Decoder 1, PHASEB input for
decoder 1.
TB1 — Timer B, Channel 1
SPI 1 Master Out/Slave In — This serial data pin is an
output from a master device and an input to a slave device.
The master device places data on the MOSI line a
half-cycle before the clock edge the slave device uses to
latch the data. To activate the SPI function, set the
PHSB_ALT bit in the SIM_GPS register. For details, see
Port C GPIO — This GPIO pin can be individually
programmed as an input or output pin.
After reset, the default state is PHASEB1.
To deactivate the internal pull-up resistor, clear bit 1 in the
GPIOC_PUR register.
INDEX1
(TB2)
(MISO1)
(GPIOC2)
11
Schmitt
Input
Schmitt
Input/
Output
Schmitt
Input/
Output
Schmitt
Input/
Output
Input
Index1 — Quadrature Decoder 1, INDEX input
TB2 — Timer B, Channel 2
SPI 1 Master In/Slave Out — This serial data pin is an
input to a master device and output from a slave device.
The MISO line of a slave device is placed in the
high-impedance state if the slave device is not selected.
The slave device places data on the MISO line a half-cycle
before the clock edge the master device uses to latch the
data. To activate the SPI function, set the INDEX_ALT bit
in the SIM_GPS register. For details, see Section 6.5.8.
Port C GPIO — This GPIO pin can be individually
programmed as an input or output pin.
After reset, the default state is INDEX1.
To deactivate the internal pull-up resistor, clear bit 2 in the
GPIOC_PUR register.
Table 2-2 56F8355 Signal and Package Information for the 128-Pin LQFP
Signal Name
Pin No.
Type
State
During
Reset
Signal Description
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