參數(shù)資料
型號(hào): MC56F8355VFG60
廠商: MOTOROLA INC
元件分類: 數(shù)字信號(hào)處理
英文描述: 4-BIT, 120 MHz, OTHER DSP, PQFP128
封裝: LQFP-128
文件頁數(shù): 62/152頁
文件大?。?/td> 2224K
代理商: MC56F8355VFG60
56F8355 Signal Pins
56F8355 Technical Data
17
Preliminary
GPIOB4
(A20)
(prescaler_clock)
31
Schmitt
Input/
Output
Input
Tri-stated
Port B GPIO — This GPIO pin can be individually
programmed as an input or output pin.
Address Bus — A20 specifies one of the address lines for
external program or data memory accesses. Depending
upon the state of the DRV bit in the EMI bus control
register (BCR), A20 and EMI control signals are tri-stated
when the external bus is inactive.
Clock Output — can be used to monitor the
prescaler_clock on GPIOB4.
After reset, the default state is GPIO.
This pin can also be used to view the prescaler_clock. In
these cases, the GPIOB_PER can be used to disable the
GPIO. The CLKOSR register in the SIM can then be used
to choose between address and clock functions; see
Section 6.5.7 for details.
To deactivate the internal pull-up resistor, clear
D7
(GPIOF0)
22
Input/
Output
Input/
Output
Tri-stated
Data Bus — D7 - D10 specify part of the data for external
program or data memory accesses. Depending upon the
state of the DRV bit in the EMI bus control register (BCR),
D7 - D10 are tri-stated when the external bus is inactive
Port F GPIO — These four GPIO pins can be individually
programmed as input or output pins.
After reset, these pins default to data bus functionality and
should be programmed as GPIO.
To deactivate the internal pull-up resistor, clear the
appropriate GPIO bit in the GPIOF_PUR register.
Example: GPIOF0, clear bit 0 in the GPIOF_PUR register.
Note: Primary function is not available in this package
configuration; GPIO function must be used instead.
D8
(GPIOF1)
23
D9
(GPIOF2)
24
D10
(GPIOF3)
26
Table 2-2 56F8355 Signal and Package Information for the 128-Pin LQFP
Signal Name
Pin No.
Type
State
During
Reset
Signal Description
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