參數(shù)資料
型號: MC56F8355VFG60
廠商: MOTOROLA INC
元件分類: 數(shù)字信號處理
英文描述: 4-BIT, 120 MHz, OTHER DSP, PQFP128
封裝: LQFP-128
文件頁數(shù): 10/152頁
文件大?。?/td> 2224K
代理商: MC56F8355VFG60
Register Descriptions
56F8355 Technical Data
107
Preliminary
6.5.9.9
Quad Timer B Enable (TMRB)—Bit 7
Each bit controls clocks to the indicated peripheral.
1 = Clocks are enabled
0 = The clock is not provided to the peripheral (the peripheral is disabled)
6.5.9.10
Quad Timer A Enable (TMRA)—Bit 6
Each bit controls clocks to the indicated peripheral.
1 = Clocks are enabled
0 = The clock is not provided to the peripheral (the peripheral is disabled)
6.5.9.11
Serial Communications Interface 1 Enable (SCI1)—Bit 5
Each bit controls clocks to the indicated peripheral.
1 = Clocks are enabled
0 = The clock is not provided to the peripheral (the peripheral is disabled)
6.5.9.12
Serial Communications Interface 0 Enable (SCI0)—Bit 4
Each bit controls clocks to the indicated peripheral.
1 = Clocks are enabled
0 = The clock is not provided to the peripheral (the peripheral is disabled)
6.5.9.13
Serial Peripheral Interface 1 Enable (SPI1)—Bit 3
Each bit controls clocks to the indicated peripheral.
1 = Clocks are enabled
0 = The clock is not provided to the peripheral (the peripheral is disabled)
6.5.9.14
Serial Peripheral Interface 0 Enable (SPI0)—Bit 2
Each bit controls clocks to the indicated peripheral.
1 = Clocks are enabled
0 = The clock is not provided to the peripheral (the peripheral is disabled)
6.5.9.15
Pulse Width Modulator B Enable (PWMB)—Bit 1
Each bit controls clocks to the indicated peripheral.
1 = Clocks are enabled
0 = The clock is not provided to the peripheral (the peripheral is disabled)
6.5.9.16
Pulse Width Modulator A Enable (PWMA)—Bit 0
Each bit controls clocks to the indicated peripheral.
1 = Clocks are enabled
0 = The clock is not provided to the peripheral (the peripheral is disabled)
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相關代理商/技術參數(shù)
參數(shù)描述
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