參數(shù)資料
型號: MC56F8347MPY60
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 數(shù)字信號處理
英文描述: 16-BIT, 120 MHz, OTHER DSP, PQFP160
封裝: LQFP-160
文件頁數(shù): 93/172頁
文件大小: 2202K
代理商: MC56F8347MPY60
Signal Pins
56F8347 Technical Data, Rev. 5.0
Freescale Semiconductor
27
Preliminary
GPIOD0
(CS2)
55
Input/
Output
Input
Port D GPIO — These six GPIO pins can be individually
programmed as input or output pins.
Chip Select — CS2 - CS7 may be programmed within the EMI
module to act as chip selects for specific areas of the external
memory map.
Depending upon the state of the DRV bit in the EMI Bus Control
Register (BCR), CS2 - CS7 are tri-stated when the external bus
is inactive.
Most designs will want to change the DRV state to DRV = 1
instead of using the default setting.
At reset, these pins are configured as GPIO.
To deactivate the internal pull-up resistor, clear the appropriate
GPIO bit in the GPIOD_PUR register.
Example: GPIOD0, clear bit 0 in the GPIOD_PUR register.
GPIOD1
(CS3)
56
GPIOD2
(CS4)
57
GPIOD3
(CS5)
58
GPIOD4
(CS6)
59
GPIOD5
(CS7)
60
TXD0
(GPIOE0)
4
Output
Input/
Output
Tri-stated
Input
Transmit Data — SCI0 transmit data output
Port E GPIO — This GPIO pin can be individually programmed
as an input or output pin.
After reset, the default state is SCI output.
To deactivate the internal pull-up resistor, clear bit 0 in the
GPIOE_PUR register.
RXD0
(GPIOE1)
5
Input
Input/
Output
Input
Receive Data — SCI0 receive data input
Port E GPIO — This GPIO pin can be individually programmed
as an input or output pin.
After reset, the default state is SCI output.
To deactivate the internal pull-up resistor, clear bit 1 in the
GPIOE_PUR register.
Table 2-2 Signal and Package Information for the 160-Pin LQFP
Signal Name
Pin
No.
Type
State
During
Reset
Signal Description
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