參數資料
型號: MC56F8347MPY60
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 數字信號處理
英文描述: 16-BIT, 120 MHz, OTHER DSP, PQFP160
封裝: LQFP-160
文件頁數: 167/172頁
文件大?。?/td> 2202K
代理商: MC56F8347MPY60
56F8347 Technical Data, Rev. 5.0
94
Freescale Semiconductor
Preliminary
5.6.9.1
SCI0 Receiver Full Interrupt Priority Level (SCI0_RCV IPL)—Bits 15–14
This field is used to set the interrupt priority level for IRQs. This IRQ is limited to priorities 0 through 2.
They are disabled by default.
00 = IRQ disabled (default)
01 = IRQ is priority level 0
10 = IRQ is priority level 1
11 = IRQ is priority level 2
5.6.9.2
SCI0 Receiver Error Interrupt Priority Level (SCI0_RERR IPL)—
Bits 13–12
This field is used to set the interrupt priority level for IRQs. This IRQ is limited to priorities 0 through 2.
They are disabled by default.
00 = IRQ disabled (default)
01 = IRQ is priority level 0
10 = IRQ is priority level 1
11 = IRQ is priority level 2
5.6.9.3
Reserved—Bits 11–10
This bit field is reserved or not implemented. It is read as 0 and cannot be modified by writing.
5.6.9.4
SCI0 Transmitter Idle Interrupt Priority Level (SCI0_TIDL IPL)—
Bits 9–8
This field is used to set the interrupt priority level for IRQs. This IRQ is limited to priorities 0 through 2.
They are disabled by default.
00 = IRQ disabled (default)
01 = IRQ is priority level 0
10 = IRQ is priority level 1
11 = IRQ is priority level 2
5.6.9.5
SCI0 Transmitter Empty Interrupt Priority Level (SCI0_XMIT IPL)—
Bits 7–6
This field is used to set the interrupt priority level for IRQs. This IRQ is limited to priorities 0 through 2.
They are disabled by default.
00 = IRQ disabled (default)
01 = IRQ is priority level 0
10 = IRQ is priority level 1
11 = IRQ is priority level 2
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