參數(shù)資料
型號: MC56F8036VLF
廠商: Freescale Semiconductor
文件頁數(shù): 137/164頁
文件大?。?/td> 0K
描述: IC DGTL SGNL CTLR 16BIT 48-LQFP
標準包裝: 1,250
系列: 56F8xxx
核心處理器: 56800E
芯體尺寸: 16-位
速度: 32MHz
連通性: CAN,I²C,SCI,SPI
外圍設備: POR,PWM,WDT
輸入/輸出數(shù): 39
程序存儲器容量: 64KB(32K x 16)
程序存儲器類型: 閃存
RAM 容量: 4K x 16
電壓 - 電源 (Vcc/Vdd): 3 V ~ 3.6 V
數(shù)據(jù)轉換器: A/D 10x12b; D/A 2x12b
振蕩器型: 內部
工作溫度: -40°C ~ 105°C
封裝/外殼: 48-LQFP
包裝: 托盤
產(chǎn)品目錄頁面: 734 (CN2011-ZH PDF)
56F8036 Data Sheet, Rev. 6
74
Freescale Semiconductor
5.6.11
Fast Interrupt 0 Vector Address High Register (FIVAH0)
Figure 5-13 Fast Interrupt 0 Vector Address High Register (FIVAH0)
5.6.11.1
Reserved—Bits 15–5
This bit field is reserved. Each bit must be set to 0.
5.6.11.2
Fast Interrupt 0 Vector Address High (FIVAH0)—Bits 4–0
The upper five bits of the vector address used for Fast Interrupt 0. This register is combined with FIVAL0
to form the 21-bit vector address for Fast Interrupt 0 defined in the FIM0 register.
5.6.12
Fast Interrupt 1 Match Register (FIM1)
Figure 5-14 Fast Interrupt 1 Match Register (FIM1)
5.6.12.1
Reserved—Bits 15–6
This bit field is reserved. Each bit must be set to 0.
5.6.12.2
Fast Interrupt 1 Vector Number (FAST INTERRUPT 1)—Bits 5–0
These values determine which IRQ will be Fast Interrupt 1. Fast Interrupts vector directly to a service
routine based on values in the Fast Interrupt Vector Address registers without having to go to a jump table
first. IRQs used as Fast Interrupts must be set to priority level 2. Unexpected results will occur if a Fast
Interrupt vector is set to any other priority. A Fast Interrupt automatically becomes the highest priority
level 2 interrupt, regardless of its location in the interrupt table prior to being declared as Fast Interrupt.
Fast Interrupt 0 has priority over Fast Interrupt 1. To determine the vector number of each IRQ, refer to
the vector table.
5.6.13
Fast Interrupt 1 Vector Address Low Register (FIVAL1)
Figure 5-15 Fast Interrupt 1 Vector Address Low Register (FIVAL1)
Base + $A
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Read
0
FAST INTERRUPT 0 VECTOR
ADDRESS HIGH
Write
RESET
00000
0000000
0000
Base + $B
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Read
0
FAST INTERRUPT 1
Write
RESET
00000
0000000
0000
Base + $C
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Read
FAST INTERRUPT 1 VECTOR ADDRESS LOW
Write
RESET
00000
0000000
0000
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