- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄359138 > MC56F8014VFAE (飛思卡爾半導體(中國)有限公司) 16-bit Digital Signal Controllers PDF資料下載
參數(shù)資料
| 型號： | MC56F8014VFAE |
| 廠商： | 飛思卡爾半導體(中國)有限公司 |
| 英文描述： | 16-bit Digital Signal Controllers |
| 中文描述： | 16位數(shù)字信號控制器 |
| 文件頁數(shù)： | 7/124頁 |
| 文件大?。?/td> | 1878K |
| 代理商： | MC56F8014VFAE |
第1頁第2頁第3頁第4頁第5頁第6頁當前第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁
Award-Winning Development Environment
56F8014 Technical Data, Rev. 3
Freescale Semiconductor
Preliminary
7
PWM frequency. Edge-aligned and center-aligned synchronous pulse width control (0% to 100%
modulation) is supported. The device is capable of controlling most motor types: ACIM (AC Induction
Motors), both BDC and BLDC (Brush and Brushless DC motors), SRM and VRM (Switched and Variable
Reluctance Motors), and stepper motors. The PWM incorporates fault protection and cycle-by-cycle
current limiting with sufficient output drive capability to directly drive standard optoisolators. A
“smoke-inhibit”, write-once protection feature for key parameters is also included. A patented PWM
waveform distortion correction circuit is also provided. Each PWM is double-buffered and includes
interrupt controls to permit integral reload rates to be programmable from 1/2 (center-aligned mode only)
to 16. The PWM module provides reference outputs to synchronize the Analog-to-Digital Converter
(ADC) through Quad Timer, Channels 2 and 3.
This Digital Signal Controller also provides a full set of standard programmable peripherals that include
one Serial Communications Interface (SCI), one Serial Peripheral Interface (SPI), one Quad Timer, and
one Inter-Integrated Circuit (I
2
C) interface. Any of these interfaces can also be used as General Purpose
Input/Outputs (GPIOs).
1.3 Award-Winning Development Environment
Processor Expert
TM
(PE) provides a Rapid Application Design (RAD) tool that combines easy-to-use
component-based software application creation with an expert knowledge system.
The CodeWarrior Integrated Development Environment is a sophisticated tool for code navigation,
compiling, and debugging. A complete set of evaluation modules (EVMs), demonstration board kit and
development system cards will support concurrent engineering. Together, PE, CodeWarrior and EVMs
create a complete, scalable tools solution for easy, fast, and efficient development.
1.4 Architecture Block Diagram
The 56F8014’s architecture is shown in
Figure 1-1
,
Figure 1-2
, and
Figure 1-3
.
Figure 1-1
illustrates
how the 56800E system buses communicate with internal memories and the IPBus Bridge.
Table 1-1
lists
the internal buses in the 56800E architecture and provides a brief description of their function.
Figure 1-2
and
Figure 1-3
show the peripherals and control blocks connected to the IPBus Bridge. The figures do not
show the on-board regulator and power and ground signals. They also do not show the multiplexing
between peripherals or the dedicated GPIOs. Please see
Part 2 Signal/Connection Descriptions
to see
which signals are multiplexed with those of other peripherals.
1.4.1
Figure 1-3
shows the over/under voltage connections from the ADC to the PWM and the connections to
the PWM from the TMR and GPIO. These signals can control the PWM outputs in a similar manner to the
over/under voltage control signals. See the
56F8000 Peripheral Reference Manual
for additional
information.
PWM, TMR and ADC Connections
The PWM_reload_sync output can be connected to the TMR channel 3 input and the TMR channels 2 and
3 outputs are connected to the ADC sync inputs. TMR channel 3 output is connected to SYNCO and TMR
channel 2 is connected to SYNC1. These are controlled by bits in the SIM Control Register; see
Section
6.3.1
.
相關PDF資料 |
PDF描述 |
|---|---|
| MC56F8155VFG | 16-bit Hybrid Controllers |
| MC56F8323 | 16-bit Hybrid Controller(16位混合控制器) |
| MC56F8345 | 16-bit Hybrid Controller(16位混合控制器) |
| MC56F8346 | 16-bit Hybrid Controller(16位混合控制器) |
| MC56F8366MFV60 | 16-bit Digital Signal Controllers |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| MC56F8023 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:16-bit Digital Signal Controllers |
| MC56F8023VLC | 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 16 BIT DSPHC RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風格:SMD/SMT |
| MC56F8025 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:16-bit Digital Signal Controllers |
| MC56F8025E | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Digital Signal Controller Product Brief |
| MC56F8025MLD | 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 16 BIT DSPHC RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風格:SMD/SMT |
發(fā)布緊急采購，3分鐘左右您將得到回復。