參數(shù)資料
型號: MC56F8011VFAE
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 數(shù)字信號處理
英文描述: 0-BIT, 8 MHz, OTHER DSP, PQFP32
封裝: ROHS COMPLIANT, LQFP-32
文件頁數(shù): 72/125頁
文件大?。?/td> 1702K
代理商: MC56F8011VFAE
56F8013/56F8011 Data Sheet, Rev. 11
50
Freescale Semiconductor
5.5.1.1
LVI IPL—Bits 15–14
This field is used to set the interrupt priority levels for a peripheral IRQ. This IRQ is limited to priorities
0 through 2 and is disabled by default.
00 = IRQ disabled (default)
01 = IRQ is priority level 0
10 = IRQ is priority level 1
11 = IRQ is priority level 2
5.5.1.2
Reserved—Bits 13–10
This bit field is reserved or not implemented. It is read as 0 and cannot be modified by writing.
5.5.1.3
EOnCE Receive Register Full Interrupt Priority Level
(RX_REG IPL)— Bits 9–8
This field is used to set the interrupt priority level for IRQs. This IRQ is limited to priorities 1 through 3.
It is disabled by default.
00 = IRQ disabled (default)
01 = IRQ is priority level 1
10 = IRQ is priority level 2
11 = IRQ is priority level 3
5.5.1.4
EOnCE Transmit Register Empty Interrupt Priority Level
(TX_REG IPL)— Bits 7–6
This field is used to set the interrupt priority level for IRQs. This IRQ is limited to priorities 1 through 3.
It is disabled by default.
00 = IRQ disabled (default)
01 = IRQ is priority level 1
10 = IRQ is priority level 2
11 = IRQ is priority level 3
5.5.1.5
EOnCE Trace Buffer Interrupt Priority Level
(TRBUF IPL)— Bits 5–4
This field is used to set the interrupt priority level for IRQs. This IRQ is limited to priorities 1 through 3.
It is disabled by default.
00 = IRQ disabled (default)
01 = IRQ is priority level 1
10 = IRQ is priority level 2
11 = IRQ is priority level 3
5.5.1.6
EOnCE Breakpoint Unit Interrupt Priority Level
(BKPT_U IPL)— Bits 3–2
This field is used to set the interrupt priority level for IRQs. This IRQ is limited to priorities 1 through 3.
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