參數(shù)資料
型號(hào)： MC56F8011VFAE
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 數(shù)字信號(hào)處理
英文描述： 0-BIT, 8 MHz, OTHER DSP, PQFP32
封裝： ROHS COMPLIANT, LQFP-32
文件頁數(shù)： 6/125頁
文件大小： 1702K
代理商： MC56F8011VFAE
Reset, Stop, Wait, Mode Select, and Interrupt Timing
56F8013/56F8011 Data Sheet, Rev. 11
Freescale Semiconductor
103
Figure 10-5 Relaxation Oscillator Temperature Variation (Typical) After Factory Trim
10.8 Reset, Stop, Wait, Mode Select, and Interrupt Timing
Note: All the address and data buses described here are internal.
Table 10-13 Reset, Stop, Wait, Mode Select, and Interrupt Timing1,2
1. In the formulas, T = clock cycle and Tosc = oscillator clock cycle. For an operating frequency of 32MHz, T = 31.25ns. At 8MHz
(used during Reset and Stop modes), T = 125ns.
2. Parameters listed are guaranteed by design.
Characteristic
Symbol
Typical Min
Typical Max
Unit
See Figure
Minimum RESET Assertion Duration
tRA
4T
—
ns
Minimum GPIO pin Assertion for Interrupt
tIW
2T
—
ns
RESET deassertion to First Address Fetch3
3. During Power-On Reset, it is possible to use the 56F8013/56F8011 internal reset stretching circuitry to extend this period to
2^21T.
tRDA
96TOSC + 64T
97TOSC + 65T
ns
Delay from Interrupt Assertion to Fetch of first
instruction (exiting Stop)
tIF
—6T
ns
8.16
8.08
8
7.92
7.84
175
-25
-50
0
50
75
100
125
150
25
Degrees C (Junction)
MH
z
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參數(shù)描述
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