參數(shù)資料
型號: MC56F8011VFAE
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 數(shù)字信號處理
英文描述: 0-BIT, 8 MHz, OTHER DSP, PQFP32
封裝: ROHS COMPLIANT, LQFP-32
文件頁數(shù): 60/125頁
文件大?。?/td> 1702K
代理商: MC56F8011VFAE
56F8013/56F8011 Data Sheet, Rev. 11
4
Freescale Semiconductor
56F8013/56F8011 Block Diagram
Program Controller
and Hardware
Looping Unit
Data ALU
16 x 16 + 36 -> 36-Bit MAC
Three 16-bit Input Registers
Four 36-bit Accumulators
Address
Generation Unit
Bit
Manipulation
Unit
16-Bit
56800E Core
Interrupt
Controller
4
Unified Data /
Program RAM
4KB
2KB
PDB
XAB1
XAB2
XDB2
CDBR
SPI or I2C
or Timer
or GPIOB
IPBus Bridge (IPBB)
System Bus
Control
R/W Control
Memory
PAB
CDBW
CDBR
CDBW
JTAG/EOnCE
Port or
GPIOD
Digital Reg
Analog Reg
Low-Voltage
Supervisor
VCAP
VDD
VSS
VDDA
VSSA
4
RESET
7
Timer or
GPIOB
AD0
2
3
Clock
Generator*
System
Integration
Module
P
O
R
O
S
C
PWM Outputs
PWM
or Timer Port
or GPIOA
*Includes On-Chip
Relaxation Oscillator
COP/
Watchdog
AD1
3
Program Memory
8K x 16 Flash
6K x 16 Flash
ADC
or
GPIOC
SCI
or I2C
or GPIOB
2
Up to 32 MIPS at 32MHz core frequency
DSP and MCU functionality in a unified,
C-efficient architecture
56F8013 device offers 16KB Program Flash
56F8011 device offers 12KB Program Flash
56F8013 device offers 4KB Unified Data/Program
RAM
56F8011 device offers 2KB Unified Data/Program
RAM
One 6-channel PWM module
Two 3-channel 12-bit ADCs
One Serial Communication Interface (SCI) with LIN
slave functionality
One Serial Peripheral Interface (SPI)
One 16-bit Quad Timer
One Inter-Integrated Circuit (I2C) Port
Computer Operating Properly (COP)/Watchdog
On-Chip Relaxation Oscillator
Integrated Power-On Reset and Low-Voltage Interrupt
Module
JTAG/Enhanced On-Chip Emulation (OnCE) for
unobtrusive, real-time debugging
Up to 26 GPIO lines
32-pin LQFP Package
56F8013/56F8011 General Description
Note: Features in italics describe the 56F8011 device.
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