參數(shù)資料
型號: MC56F8011VFAE
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 數(shù)字信號處理
英文描述: 0-BIT, 8 MHz, OTHER DSP, PQFP32
封裝: ROHS COMPLIANT, LQFP-32
文件頁數(shù): 47/125頁
文件大小: 1702K
代理商: MC56F8011VFAE
56F8013/56F8011 Data Sheet, Rev. 11
28
Freescale Semiconductor
3.4 Block Diagram
Figure 3-2 provides a block diagram which shows how the 56F8013/56F8011 creates its internal clock,
using the relaxation oscillator as an 8MHz clock reference for the PLL.
Figure 3-2 OCCS Block Diagram with Relaxation Oscillator
TRIM[9:0]
ROSB
ROPD
Relaxation
OSC
Bus Interface and
Control
Bus
Interface
GPIOB6 / RXD
PRECS
MUX
MSTR_OSC
SYS_CLK_x2
source to the SIM
(64MHz max)
ZSRC
HS PERF CLK
(96MHz max)
Postscaler
(
÷ 1, 2, 4, 8, 16, 32)
Postscaler
(
÷ 1, 2, 4, 8, 16, 32)
÷ 3
÷ 2
PLL
X 24
Lock
Detector
Loss of
Reference
Clock
Detector
Loss of Reference Clock Interrupt
LCK
F
OU
T
/2
FE
EDB
A
CK
PLLCOD
FOUT
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