參數(shù)資料
型號(hào): MB90F897SPMT
元件分類: 微控制器/微處理器
英文描述: MICROCONTROLLER, PQFP48
封裝: 7 X 7 MM, 1.70 MM HEIGHT, 0.50 MM PITCH, PLASTIC, LQFP-48
文件頁數(shù): 37/84頁
文件大?。?/td> 1773K
代理商: MB90F897SPMT
MB90895 Series
42
DS07-13731-4E
8/16-bit PPG timer 1 block diagram
CLK
MD0
R
SQ
PEN1
PE1 PIE1 PUF1 MD1 MD0
PCS2
PCS0 PCM2 PCM1 PCM0
PCS1
3
2
PPG1
Re-
versed
Re-
served
“H” level side data bus
“L” level side data bus
PPG1 reload
register
PPG1 operation mode control
register (PPGC1)
Interrupt
request output*
Select signal
Reload selector
L/H selector
PRLH1
(“H” level side)
PRLL1
(“L” level side)
PPG1 temporary
buffer 0(PRLBH1)
Count start
value
Reload
Clear
PPG1 down
counter (PCNT1)
Under-
flow
PPG1
output latch
PPG output control circuit
Pin
Time-base timer output
(512/HCLK)
Peripheral clock (1/
φ)
Peripheral clock (2/
φ)
Peripheral clock (4/
φ)
Peripheral clock (8/
φ)
Peripheral clock (16/
φ)
Count clock
selector
Select signal
PPG0/1 count clock selection register (PPG01)
: Undefined
Reserved : Reserved bit
HCLK
: Oscillation clock frequency
φ
: Machine clock frequency
*
: Interrupt output of 8/16-bit PPG timer 1 is incorporated into one by the OR circuit against
interrupt output of 8/16-bit PPG timer 0.
Operation
mode
control
signal
PPG1 underflow
(To PPG0)
PPG0 underflow
(From PPG0)
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