參數(shù)資料
型號： MB90F897SPMT
元件分類： 微控制器/微處理器
英文描述： MICROCONTROLLER, PQFP48
封裝： 7 X 7 MM, 1.70 MM HEIGHT, 0.50 MM PITCH, PLASTIC, LQFP-48
文件頁數(shù)： 14/84頁
文件大?。?/td> 1773K
代理商： MB90F897SPMT
MB90895 Series
DS07-13731-4E
21
(Continued)
Initial values :
0 : Initial value of this bit is “0.”
1 : Initial value of this bit is “1.”
X : Initial value of this bit is undefined.
* : “Reserved area” should not be written anything. Result of reading from “Reserved area” is undefined.
Address
Register
abbreviation
Register
Read/
Write
Resource
Initial value
003C80H
to
003CFFH
(Reserved area) *
003D00H
003D01H
CSR
Control status register
R/W, R
CAN controller
0XXXX001B
00XXX000B
003D02H
LEIR
Last event display register
R/W
000XX000B
003D03H
(Reserved area) *
003D04H
003D05H
RTEC
Send/receive error counter
R
CAN controller
00000000B
003D06H
003D07H
BTR
Bit timing register
R/W
11111111B
X1111111B
003D08H
IDER
IDE register
R/W
XXXXXXXXB
003D09H
(Reserved area) *
003D0AH
TRTRR
Send RTR register
R/W
00000000B
003D0BH
(Reserved area) *
003D0CH
RFWTR
Remote frame receive wait register
R/W
CAN controller
XXXXXXXXB
003D0DH
(Reserved area) *
003D0EH
TIER
Send completion interrupt
permission register
R/W
CAN controller
00000000B
003D0FH
(Reserved area) *
003D10H
003D11H
AMSR
Acceptance mask selection register
R/W
CAN controller
XXXXXXXXB
003D12H
003D13H
(Reserved area) *
003D14H
to
003D17H
AMR0
Acceptance mask register 0
R/W
CAN controller
XXXXXXXXB
to
XXXXXXXXB
003D18H
to
003D1BH
AMR1
Acceptance mask register 1
R/W
XXXXXXXXB
to
XXXXXXXXB
003D1CH
to
003DFFH
(Reserved area) *
003E00H
to
003EFFH
(Reserved area) *
003FF0H
to
003FFFH
(Reserved area) *
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