參數(shù)資料
型號: MB89951PFM
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 5 MHz, MICROCONTROLLER, PQFP64
封裝: 0.65 MM PITCH, QFP-64
文件頁數(shù): 82/110頁
文件大?。?/td> 619K
代理商: MB89951PFM
HARDWARE CONFIGURATION
2– 58
[Bits 2 and 1] SL01 and SL00: Edge-polarity mode select bits
Bit 2 and bit 1 are used to control the input edge polarity mode of the INT0
pin.
When internal pull-up resistors option is chosen for P42 or P46, only falling
edge can wake up the CPU from stop mode or sleep mode.
[Bit 0] EIE0: Interrupt-enable bit
Bit 0 is used to enable an external-interrupt request by the INT0 pin.
(4) Precautions for external-interrupt circuit
When enabling an interrupt after clearing reset, always clear the interrupt
flag simultaneously. An interrupt request is output immediately when the
interrupt flags (EIR0, EIR1) are set to 1.
Peripherals
No edge detected
Rising edge
Falling edge
Both-edge mode
0
1
0
1
0
1
SL01
SL00
Disables interrupt request
Enables interrupt request by EIR0 setting
0
1
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