參數(shù)資料
型號(hào): MB89951PFM
元件分類(lèi): 微控制器/微處理器
英文描述: 8-BIT, MROM, 5 MHz, MICROCONTROLLER, PQFP64
封裝: 0.65 MM PITCH, QFP-64
文件頁(yè)數(shù): 55/110頁(yè)
文件大?。?/td> 619K
代理商: MB89951PFM
HARDWARE CONFIGURATION
2– 34
(4) Description of operation
(a) Timer function
The timer function has the following two modes.
a. Reload timer mode
Each time the counter underflows, the value written at the RLBR is
reloaded to continue counting down. In this mode, when the counter
underflows, the interrupt request flag UF (bit 2) is set. An interrupt request
is also output when the IE bit (bit 5) is set to 1. Each time the timer
underflows, the value of the TO bit (bit 5) is inverted.
b. One-shot mode
Counting stops at an underflow. In this mode, when the counter
underflows, the underflow interrupt request flag UF (bit 2) is set and the
EN bit (bit 7) is automatically set to 0 to stop counting.
In both modes, counting starts when 1 is written at the EN bit (bit 7) and
stops when 0 is written.
NCS1
NCS0
Clock pulse selected
Clock cycle at 5MHz
Noise pulse width
0
No noise clear
-
0
1
Oscillation clock pulse × 4
0.8 [
s]
4.0 [
s]
1
0
Oscillation clock pulse × 32
12.8 [
s]
64 [
s]
1
Oscillation clock pulse × 128
51.2 [
s]
256 [
s]
(d) Noise-clear control register (NCCR)
PCR1
Address: 0014H
Address: 0015H
Address: 0017H
(Initial value)
------00B
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
——————
NCS1
NCS0
(R/W)
RLBR
Address: 0016H
Address: 0017H
[Bits 1 and 0] NCS1 and NCS0: Sampling clock pulse select bits
The sampling clock pulse of the noise-clearing circuit is selected as shown
NCCR
PCR2
Peripherals
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