參數(shù)資料
型號: MB89951PFM
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 5 MHz, MICROCONTROLLER, PQFP64
封裝: 0.65 MM PITCH, QFP-64
文件頁數(shù): 29/110頁
文件大?。?/td> 619K
代理商: MB89951PFM
HARDWARE CONFIGURATION
2– 10
(3) Description of registers
The detail of each register is described below.
[Bit 7] STP: Stop bit
This bit is used to specify switching CPU to the stop mode.
This bit is cleared at reset or stop cancellation.
0 is always read when this bit is read.
[Bit 6] SLP: Sleep bit
This bit is used to specify switching the CPU to the sleep mode.
This bit is cleared at reset, sleep cancellation or stop cancellation.
0 is always read when this bit is read.
[Bit 5] SPL: Pin state specifying bit
This bit is used to specify the external pin state in the stop mode.
This bit is cleared at reset.
[Bit 4] RST: Software reset bit
This bit is used to specify the software reset.
1 is always read when this bit is read.
CPU
STBC
Address: 0008H
(a) Standby control register (STBC)
Address: 0008H
(Initial value)
0001XXXXB
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
STP
SLP
SPL
RST
————
(W)
(R/W)
(W)
0
1
No operation
Stop mode
0
1
No operation
Sleep mode
0
1
Holds pin state and level immediately before stop mode
High impedance
0
1
Generates 4-cycle reset signal
No operation
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