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參數(shù)資料
| 型號(hào)： | MB89951PFM |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 5 MHz, MICROCONTROLLER, PQFP64 |
| 封裝： | 0.65 MM PITCH, QFP-64 |
| 文件頁數(shù)： | 37/110頁 |
| 文件大?。?/td> | 619K |
| 代理商： | MB89951PFM |
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HARDWARE CONFIGURATION
2– 17
(4) Description of operation
The functions of interrupt controllers are described below.
(a) Interrupt functions
The MB89950 series of microcontrollers have 7 inputs for interrupt requests
from the peripherals. The interrupt level is set by 2-bit registers
corresponding to each input. When an interrupt is requested from a
peripheral, the interrupt controller receives it and transfers the contents of
the corresponding level register to the CPU. The interrupt to the device is
processed as follows:
(1) An interrupt source is generated inside a peripheral.
(2) If an interrupt is enabled after referring to the interrupt-enable bit
inside the peripheral, an interrupt request is output from the
peripheral to the interrupt controller.
(3) After receiving this interrupt request, the interrupt controller
determines the priority of simultaneously-requested interrupts and
then transfers the interrupt level for the applicable interrupt to the
CPU.
(4) The CPU compares the interrupt level requested from the interrupt
controller with the IL bit in the processor status register.
(5) As a result of the comparison, if the interrupt level has priority over
the current interrupt processing level, the contents of the I-flag in the
same processor status register are checked.
(6) As a result of the check in step (5), if the I-flag is enabled for an
interrupt, the contents of the IL bit are set to the required level. As
soon as the currently-executing instruction is terminated, the CPU
performs the interrupt processing and transfers control to the
interrupt-processing routine.
(7) When an interrupt source is cleared by software in the user’s interrupt
processing routine, the CPU terminates the interrupt processing.
Fig. 2.7 outlines the interrupt operation for the MB89950 series of
microcontrollers.
Fig. 2.7 Interrupt-processing Flowchart
CPU
Internal bus
Register file
IPLA
IR
PS
I
IL
Check
Comparator
CPU
(5)
(4)
Enable FF
Source FF
AND
Level
comparator
Interrupt controller
(1)
(2)
(7)
Peripheral
(3)
(6)
Peripheral
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MB89953 | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:8-bit Proprietary Microcontroller |
| MB89953PFM | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:8-bit Proprietary Microcontroller |
| MB8995X | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:8-bit Proprietary Microcontroller |
| MB89960 | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:8-bit Proprietary Microcontroller |
| MB89965 | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:8-bit Proprietary Microcontroller |
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