SPI/I2C UART with 128-Word FIFOs Serial Controller Interface Th" />
參數(shù)資料
型號(hào)： MAX3107EVKIT+
廠商： Maxim Integrated Products
文件頁(yè)數(shù)： 39/52頁(yè)
文件大?。?/td> 0K
描述： EVAL KIT I2C/SPI UART MAX3107
產(chǎn)品培訓(xùn)模塊： Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝： 1
主要目的： 接口，UART
已用 IC / 零件： MAX3107
主要屬性： 圖形用戶界面（GUI）
次要屬性： I²C & SPI 接口
已供物品： 板，線纜
SPI/I2C UART with 128-Word FIFOs
Serial Controller Interface
The MAX3107 can be controlled through SPI or I2C as
defined by the logic on I2C/SPI. See the Pin Configurations
for further details.
SPI Interface
The SPI supports both single-cycle and burst-read/write
access. The SPI master must generate clock and data
signals in SPI MODE0 (i.e., with clock polarity CPOL = 0
and clock phase CPHA = 0).
SPI Single-Cycle Access
Figure 15 shows a single-cycle read and Figure 16
shows a single-cycle write.
SPI Burst Access
Burst access allows writing and reading in one block by
only defining the initial register address in the SPI com-
mand byte. Multiple characters can be loaded into the
transmit FIFO by using the THR (0x00) as the initial burst
read address. Similarly, multiple characters can be read
out of the receiver FIFO by using the RHR (0x00) as the
SPI’s burst read address. If the SPI burst address is dif-
ferent to 0x00, the MAX3107 automatically increments
the register address after each SPI data byte. Efficient
programming of multiple consecutive registers is thus
possible. Chip select, CS/A0, must be kept low during
the whole cycle. The SCLK/SCL clock continues clocking
throughout the burst access cycle. The burst cycle ends
when the SPI master pulls CS/A0 high.
For example, writing 128 bytes into the TxFIFO can be
achieved by a burst write access through the following
sequence:
Pull CS/A0 low
Send SPI write command
Send 128 byes
Release CS/A0
This takes a total of (1 + 128) x 8 clock cycles.
I2C Interface
The MAX3107 contains an I2C-compatible interface for
data communication with a host processor (SCL and
SDA). The interface supports a clock frequency up to
400kHz. SCL and SDA require pullup resistors that are
connected to a positive supply.
Figure 15. SPI Single-Cycle Read
Figure 16. SPI Single-Cycle Write
CS
R
A6
A5
A4
A3
A2
A1
A0
D7
D6
D5
D4
D3
D2
D1
D0
SCLK
SDI
SDO
A_ = REGISTER ADDRESS
D_ = 8-BIT REGISTER CONTENTS
CS
W
A6
A5
A4
A3
A2
A1
A0
D7
D6
D5
D4
D3
D2
D1
D0
SCLK
SDI
A_ = REGISTER ADDRESS
D_ = 8-BIT REGISTER CONTENTS
44
Maxim Integrated
MAX3107
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MAX3107EVKIT+ 功能描述:UART 接口集成電路 UART with integrated Oscillator RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
MAX3108AEWA+ 制造商:Maxim Integrated Products 功能描述:LOW SHUTDOWN CURRENT SPI/I?C UART WITH 128-WORD FIFOS IN WLP - Rail/Tube
MAX3108AEWA+T 功能描述:UART 接口集成電路 SPI/I2C UART W/ 128 WORD FIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
MAX3108EWA+ 制造商:Maxim Integrated Products 功能描述:SPI/IAC UART WITH 128-WORD FIFOS IN WLP - Rail/Tube
MAX3108EWA+T 功能描述:IC UART RoHS:是 類別:集成電路 (IC) >> 接口 - UART（通用異步接收器/發(fā)送器） 系列:* 標(biāo)準(zhǔn)包裝:250 系列:- 特點(diǎn):* 通道數(shù):2，DUART FIFO's:16 字節(jié) 規(guī)程:RS232，RS485 電源電壓:2.25 V ~ 5.5 V 帶并行端口:- 帶自動(dòng)流量控制功能:是 帶IrDA 編碼器/解碼器:是 帶故障啟動(dòng)位檢測(cè)功能:是 帶調(diào)制解調(diào)器控制功能:是 帶CMOS:是 安裝類型:表面貼裝 封裝/外殼:48-TQFP 供應(yīng)商設(shè)備封裝:48-TQFP（7x7） 包裝:托盤 其它名稱:XR16L2551IM-F-ND
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