SPI/I2C UART with 128-Word FIFOs Bits 7–0: TimOut[7:0] The receive data timeout " />
參數(shù)資料
型號(hào)： MAX3107EVKIT+
廠商： Maxim Integrated Products
文件頁(yè)數(shù)： 28/52頁(yè)
文件大?。?/td> 0K
描述： EVAL KIT I2C/SPI UART MAX3107
產(chǎn)品培訓(xùn)模塊： Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝： 1
主要目的： 接口，UART
已用 IC / 零件： MAX3107
主要屬性： 圖形用戶界面（GUI）
次要屬性： I²C & SPI 接口
已供物品： 板，線纜
SPI/I2C UART with 128-Word FIFOs
Bits 7–0: TimOut[7:0]
The receive data timeout bits allow programming a time delay after the last (newest) character in the receive FIFO was
received until a receive data timeout LSR[0] interrupt is generated. The duration is measured in character intervals and
is dependent on the character length, parity, and STOP bit setting and is inversely proportional to the baud rate. If the
RxTimeOut value equals zero, a timeout interrupt is not generated.
The HDplxDelay register allows programming setup and hold times between RTS/CLKOUT and the TX output in auto
transceiver direction control mode: MODE1[4] is 1. The Hold[3:0] time can also be used for echo suppression in half-
duplex communication. HDplxDelay also functions in the 2x and 4x rate modes.
Bits 7–4: Setup[7:4]
The Setupx bits define a setup time for RTS/CLKOUT to transition high before the transmitter starts transmission of its
first character in auto transceiver direction control mode: MODE1[4]. This allows the MAX3107 to account for skew dif-
ferences of the external transmitter’s enable delay and propagation delays. Setup[7:4] can also be used to fix a stable
state on the transmission line prior to start of transmission.
The unit of the HDplxDelay setup time delay is a 1-bit interval, making this delay baud-rate dependent. The maximum
delay is 15-bit intervals.
Bits 3–0: Hold[3:0]
The Hold[3:0] bits define a hold time for RTS/CLKOUT to be held stable (high) after the transmitter ends transmission
of its last character in auto transceiver direction control mode: MODE1[4]. RTS/CLKOUT turns low after the last STOP
bit was sent with a Hold[3:0] delay. This keeps the external transmitter enabled during the hold duration.
The second factor that the Hold[3:0] bits define, is a delay in echo suppression mode, MODE2[7]. See the Echo
Suppression section for more information.
The unit of the HDplxDelay hold time delay is a 1-bit interval, making the delay baud-rate dependent. The maximum
delay is 15-bit intervals.
RxTimeOut—Receiver Timeout Register
HDplxDelay Register
ADDRESS:
0x0C
MODE:
R/W
BIT
7
6
5
4
3
2
1
0
NAME
TimOut7
TimOut6
TimOut5
TimOut4
TimOutO3
TimOut2
TimOut1
TimOut0
RESET
0
ADDRESS:
0x0D
MODE:
R/W
BIT
7
6
5
4
3
2
1
0
NAME
Setup3
Setup2
Setup1
Setup0
Hold3
Hold2
Hold1
Hold0
RESET
0
34
Maxim Integrated
MAX3107
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參數(shù)描述
MAX3107EVKIT+ 功能描述:UART 接口集成電路 UART with integrated Oscillator RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
MAX3108AEWA+ 制造商:Maxim Integrated Products 功能描述:LOW SHUTDOWN CURRENT SPI/I?C UART WITH 128-WORD FIFOS IN WLP - Rail/Tube
MAX3108AEWA+T 功能描述:UART 接口集成電路 SPI/I2C UART W/ 128 WORD FIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
MAX3108EWA+ 制造商:Maxim Integrated Products 功能描述:SPI/IAC UART WITH 128-WORD FIFOS IN WLP - Rail/Tube
MAX3108EWA+T 功能描述:IC UART RoHS:是 類別:集成電路 (IC) >> 接口 - UART（通用異步接收器/發(fā)送器） 系列:* 標(biāo)準(zhǔn)包裝:250 系列:- 特點(diǎn):* 通道數(shù):2，DUART FIFO's:16 字節(jié) 規(guī)程:RS232，RS485 電源電壓:2.25 V ~ 5.5 V 帶并行端口:- 帶自動(dòng)流量控制功能:是 帶IrDA 編碼器/解碼器:是 帶故障啟動(dòng)位檢測(cè)功能:是 帶調(diào)制解調(diào)器控制功能:是 帶CMOS:是 安裝類型:表面貼裝 封裝/外殼:48-TQFP 供應(yīng)商設(shè)備封裝:48-TQFP（7x7） 包裝:托盤 其它名稱:XR16L2551IM-F-ND
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