SPI/I2C UART with 128-Word FIFOs Bits 7–0: RData[7:0] The RHR is the bottom of t" />
參數(shù)資料
型號: MAX3107EVKIT+
廠商: Maxim Integrated Products
文件頁數(shù): 16/52頁
文件大?。?/td> 0K
描述: EVAL KIT I2C/SPI UART MAX3107
產(chǎn)品培訓(xùn)模塊: Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 1
主要目的: 接口,UART
已用 IC / 零件: MAX3107
主要屬性: 圖形用戶界面(GUI)
次要屬性: I²C & SPI 接口
已供物品: 板,線纜
SPI/I2C UART with 128-Word FIFOs
Bits 7–0: RData[7:0]
The RHR is the bottom of the receive FIFO and is the register used for reading data out of the receive FIFO. It contains
the oldest (first received) character in the receive FIFO. RHR[0] is the LSB of the character received at the RX input. It
is the first data bit of the serial-data word received by the receiver.
Interrupt Structure
The structure of the interrupt is shown in Figure 13. There
are four interrupt source registers: ISR, LSR, STSInt, and
SpclCharInt. The interrupt sources are divided into top-
level and low-level interrupts. The top-level interrupts
typically occur more often and can be read out directly
through the ISR. The low-level interrupts typically occur
less often and their specific source can be read out
through the LSR, STSInt, or SpclChar registers. The three
LSBs of the ISR point to the low-level interrupt registers
that contain the source detail of the interrupt source.
Interrupt Enabling
Every interrupt bit of the four interrupt registers can be
enabled or masked through an associated interrupt
enable register bit. These are the IRQEn, LSRIntEn,
SpclChrIntEn and STSIntEn registers.
Interrupt Clearing
When an ISR interrupt is pending (i.e., any bit in ISR is
set) and the ISR is subsequently read, the ISR bits and
IRQ are cleared. Both the SpclCharInt and the STSInt
registers also are clear on read (COR). The LSR bits are
only cleared when the source of the interrupt is removed,
not when LSR is read.
Detailed Register Descriptions
The MAX3107 has a flat register structure, without shad-
ow registers, that makes programming and code simple
and efficient. All registers are 8 bits wide.
Figure 13. Simplified Interrupt Structure
RHR—Receiver Hold Register
7
6
5
4
3
2
1
0
ISR
8
[7]
IRQ
POWER-UP DONE
MODE1[7]: IRQSel
[0]
LOW-LEVEL INTERRUPTS
TOP-LEVEL INTERRUPTS
7
6
5
4
3
2
1
0
SpclChrInt
8
7
6
5
4
3
2
1
0
STSInt
8
7
6
5
4
3
2
1
0
LSR
8
ADDRESS:
0x00
MODE:
R
BIT
7
6
5
4
3
2
1
0
NAME
RData7
RData6
RData5
RData4
RData3
RData2
RData1
RData0
RESET
X
Maxim Integrated
23
MAX3107
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MAX3107EVKIT+ 功能描述:UART 接口集成電路 UART with integrated Oscillator RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
MAX3108AEWA+ 制造商:Maxim Integrated Products 功能描述:LOW SHUTDOWN CURRENT SPI/I?C UART WITH 128-WORD FIFOS IN WLP - Rail/Tube
MAX3108AEWA+T 功能描述:UART 接口集成電路 SPI/I2C UART W/ 128 WORD FIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
MAX3108EWA+ 制造商:Maxim Integrated Products 功能描述:SPI/IAC UART WITH 128-WORD FIFOS IN WLP - Rail/Tube
MAX3108EWA+T 功能描述:IC UART RoHS:是 類別:集成電路 (IC) >> 接口 - UART(通用異步接收器/發(fā)送器) 系列:* 標(biāo)準(zhǔn)包裝:250 系列:- 特點(diǎn):* 通道數(shù):2,DUART FIFO's:16 字節(jié) 規(guī)程:RS232,RS485 電源電壓:2.25 V ~ 5.5 V 帶并行端口:- 帶自動流量控制功能:是 帶IrDA 編碼器/解碼器:是 帶故障啟動位檢測功能:是 帶調(diào)制解調(diào)器控制功能:是 帶CMOS:是 安裝類型:表面貼裝 封裝/外殼:48-TQFP 供應(yīng)商設(shè)備封裝:48-TQFP(7x7) 包裝:托盤 其它名稱:XR16L2551IM-F-ND