SPI/I2C UART with 128-Word FIFOs Bits 7–0: TData[7:0] The THR is the register th" />
參數(shù)資料
型號(hào)： MAX3107EVKIT+
廠商： Maxim Integrated Products
文件頁數(shù)： 17/52頁
文件大小： 0K
描述： EVAL KIT I2C/SPI UART MAX3107
產(chǎn)品培訓(xùn)模塊： Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝： 1
主要目的： 接口，UART
已用 IC / 零件： MAX3107
主要屬性： 圖形用戶界面（GUI）
次要屬性： I²C & SPI 接口
已供物品： 板，線纜
SPI/I2C UART with 128-Word FIFOs
Bits 7–0: TData[7:0]
The THR is the register that the host controller writes data to for subsequent UART transmission. This data is deposited
in the transmit FIFO. THR[0] is the LSB. It is the first data bit of the serial-data word that the transmitter sends out, right
after the START bit.
The IRQEn is used to enable the IRQ physical interrupt. Any of the eight ISR interrupt sources can be enabled to gener-
ate an IRQ. The IRQEn bits only influence the IRQ output and do not have any effect on the ISR contents or behavior.
Every one of the IRQEn bits operates on an ISR bit.
Bit 7: CTSIEn
The CTSIEn bit enables IRQ interrupt generation when the CTSInt interrupt bit is set in the ISR. Set CTSIEn bit low to
disable IRQ generation from CTSInt.
Bit 6: RxEmtyIEn
The RxEmtyIEn bit enables IRQ interrupt generation when the RxEmtyInt interrupt bit is set in the ISR. Set RxEmtyIEn
bit low to disable IRQ generation from RxEmtyInt.
Bit 5: TxEmtyIEn
The TxEmtyIEn bit enables IRQ interrupt generation when the TxEmptyInt interrupt bit is set in the ISR. Set TxEmtyIEn
bit low to disable IRQ generation from TxEmptyInt.
Bit 4: TxTrgIEn
The TxTrgIEn bit enables IRQ interrupt generation when the TFifoTrigInt interrupt bit is set in the ISR. Set TxTrgIEn bit
low to disable IRQ generation from TFifoTrigInt.
Bit 3: RxTrgIEn
The RxTrgIEn bit enables IRQ interrupt generation when the RFifoTrigInt interrupt bit is set in the ISR. Set RxTrgIEn bit
low to disable IRQ generation from RFifoTrigInt.
Bit 2: STSIEn
The STSIEn bit enables IRQ interrupt generation when the STSInt interrupt bit is set in the ISR. Set STSIEn bit low to
disable IRQ generation from STSInt.
Bit 1: SpclChrlEn
The SpclChrIEn bit enables IRQ interrupt generation when the SpCharInt interrupt bit is set in the ISR. Set SpclChrIEn
bit low to disable IRQ generation from SpCharInt.
THR—Transmit Hold Register
IRQEn—IRQ Enable Register
ADDRESS:
0x00
MODE:
W
BIT
7
6
5
4
3
2
1
0
NAME
TData7
TData6
TData5
TData4
TData3
TData2
TData1
TData0
ADDRESS:
0x01
MODE:
R/W
BIT
7
6
5
4
3
2
1
0
NAME
CTSIEn
RxEmtyIEn
TxEmtyIEn
TxTrgIEn
RxTrgIEn
STSIEn
SpclChrIEn
LSRErrIEn
RESET
0
24
Maxim Integrated
MAX3107
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MAX3107EVKIT+ 功能描述:UART 接口集成電路 UART with integrated Oscillator RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
MAX3108AEWA+ 制造商:Maxim Integrated Products 功能描述:LOW SHUTDOWN CURRENT SPI/I?C UART WITH 128-WORD FIFOS IN WLP - Rail/Tube
MAX3108AEWA+T 功能描述:UART 接口集成電路 SPI/I2C UART W/ 128 WORD FIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
MAX3108EWA+ 制造商:Maxim Integrated Products 功能描述:SPI/IAC UART WITH 128-WORD FIFOS IN WLP - Rail/Tube
MAX3108EWA+T 功能描述:IC UART RoHS:是 類別:集成電路 (IC) >> 接口 - UART（通用異步接收器/發(fā)送器） 系列:* 標(biāo)準(zhǔn)包裝:250 系列:- 特點(diǎn):* 通道數(shù):2，DUART FIFO's:16 字節(jié) 規(guī)程:RS232，RS485 電源電壓:2.25 V ~ 5.5 V 帶并行端口:- 帶自動(dòng)流量控制功能:是 帶IrDA 編碼器/解碼器:是 帶故障啟動(dòng)位檢測功能:是 帶調(diào)制解調(diào)器控制功能:是 帶CMOS:是 安裝類型:表面貼裝 封裝/外殼:48-TQFP 供應(yīng)商設(shè)備封裝:48-TQFP（7x7） 包裝:托盤 其它名稱:XR16L2551IM-F-ND
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