參數(shù)資料
型號: MAX148
廠商: Maxim Integrated Products, Inc.
英文描述: +2.7V to +5.25V, Low-Power, 8-Channel, Serial 10-Bit ADCs(8通道,133ksps,串行10位A/D轉(zhuǎn)換器)
中文描述: +2.7V至+5.25V、低功耗、8通道、串行10位ADC
文件頁數(shù): 7/20頁
文件大?。?/td> 200K
代理商: MAX148
M
+2.7V, Low-Power, 8-Channel,
S erial 10-Bit ADC
_______________________________________________________________________________________
7
V
DD
6k
DGND
DOUT
C
LOAD
100pF
C
LOAD
100pF
DGND
6k
DOUT
a)
High-Z to V
OH
and V
OL
to V
OH
b)
High-Z to V
OL
and V
OH
to V
OL
V
DD
6k
DGND
DOUT
C
LOAD
100pF
C
LOAD
100pF
DGND
6k
DOUT
a)
V
OH
to High-Z
b)
V
OL
to High-Z
INPUT
SHIFT
REGISTER
CONTROL
LOGIC
INT
CLOCK
OUTPUT
SHIFT
REGISTER
T/H
ANALOG
INPUT
MUX
10+2 BIT
SAR
ADC
IN
DOUT
SSTRB
V
DD
DGND
AGND
SCLK
DIN
CH0
CH1
CH2
CH3
CH4
CH7
COM
VREF
(2.500V)
CH6
CH5
OUT
REF
CLOCK
1
2
3
4
5
6
7
8
9
10
11
15
16
17
18
19
MAX148
CS
SHDN
12, 20
14
13
Figure 1. Load Circuits for Enable Time
Figure 2. Load Circuits for Disable Time
Figure 3. Block Diagram
CH0
CH1
CH2
CH3
CH4
CH5
CH6
CH7
COM
C
SWITCH
TRACK
T/H
SWITCH
R
IN
9k
C
HOLD
HOLD
12-BIT CAPACITIVE DAC
VREF
ZERO
COMPARATOR
+
16pF
SINGLE-ENDED MODE: IN+ = CHO–CH7, IN- = COM.
DIFFERENTIAL MODE: IN+ AND IN- SELECTED FROM PAIRS OF
CH0/CH1, CH2/CH3, CH4/CH5, AND CH6/CH7.
AT THE SAMPLING INSTANT,
THE MUX INPUT SWITCHES
FROM THE SELECTED IN+
CHANNEL TO THE SELECTED
IN- CHANNEL.
INPUT
MUX
Figure 4. Equivalent Input Circuit
to 0V within the limits of 10-bit resolution. This action is
equivalent to transferring a charge of 16pF x [(V
IN
+
) -
(V
IN
-)] from C
HOLD
to the binary-weighted capacitive
DAC, which in turn forms a digital representation of the
analog input signal.
T rac k/Hold
The T/H enters its tracking mode on the falling clock
edge after the fifth bit of the 8-bit control word has been
shifted in. It enters its hold mode on the falling clock
edge after the eighth bit of the control word has been
shifted in. If the converter is set up for single-ended
inputs, IN- is connected to COM, and the converter
samples the “+” input. If the converter is set up for dif-
ferential inputs, IN- connects to the “-” input, and the
difference of
|
IN+ - IN-
|
is sampled. At the end of the
conversion, the positive input connects back to IN+,
and C
HOLD
charges to the input signal.
The time required for the T/H to acquire an input signal
is a function of how quickly its input capacitance is
charged. If the input signal’s source impedance is high,
the acquisition time lengthens, and more time must be
allowed between conversions. The acquisition time,
t
ACQ
, is the maximum time the device takes to acquire
the signal, and is also the minimum time needed for the
signal to be acquired. It is calculated by:
t
ACQ
= 7 x (R
S
+ R
IN
) x 16pF
where R
IN
= 9k
, R
S
= the source impedance of the
input signal, and t
ACQ
is never less than 1.5μs. Note
that source impedances below 4k
do not significantly
affect the AC performance of the ADC.
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