參數(shù)資料
型號(hào)： MAX148
廠商： Maxim Integrated Products, Inc.
英文描述： +2.7V to +5.25V, Low-Power, 8-Channel, Serial 10-Bit ADCs(8通道，133ksps，串行10位A/D轉(zhuǎn)換器)
中文描述： +2.7V至+5.25V、低功耗、8通道、串行10位ADC
文件頁(yè)數(shù)： 18/20頁(yè)
文件大?。?/td> 200K
代理商： MAX148
M
+2.7V, Low-Power, 8-Channel,
S erial 10-Bit ADC
18
______________________________________________________________________________________
1)
The TMS320 should be configured with CLKX
(transmit clock) as an active-high output clock and
CLKR (TMS320 receive clock) as an active-high
input clock. CLKX and CLKR on the TMS320 are
tied together with the MAX148’s SCLK input.
The MAX148’s
CS
pin is driven low by the TMS320’s
XF_ I/O port, to enable data to be clocked into the
MAX148’s DIN.
An 8-bit word (1XXXXX11) should be written to the
MAX148 to initiate a conversion and place the
device into external clock mode. Refer to Table 1 to
select the proper XXXXX bit values for your specific
application.
The MAX148’s SSTRB output is monitored via the
TMS320’s FSR input. A falling edge on the SSTRB
output indicates that the conversion is in progress
and data is ready to be received from the MAX148.
The TMS320 reads in one data bit on each of the
next 16 rising edges of SCLK. These data bits rep-
resent the 10+2-bit conversion result followed by
four trailing bits, which should be ignored.
Pull
CS
high to disable the MAX148 until the next
conversion is initiated.
2)
3)
4)
5)
6)
CS
SCLK
DIN
SSTRB
DOUT
START
SEL2
SEL1
SEL0
UNI/BIP SGL/DIF
PD1
PD0
MSB
B8
S1
S0
HIGH
IMPEDANCE
HIGH
IMPEDANCE
Figure 19. TMS320 Serial-Interface Timing Diagram
XF
CLKX
CLKR
DX
DR
FSR
CS
SCLK
DIN
DOUT
SSTRB
TMS320LC3x
MAX148
Figure 18. MAX148-to-TMS320 Serial Interface
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