參數(shù)資料
型號(hào)： M58LR128FB95ZB6E
廠商： NUMONYX
元件分類： PROM
英文描述： 8M X 16 FLASH 1.8V PROM, 95 ns, PBGA56
封裝： 7.70 X 9 MM, 0.75 MM PITCH, LEAD FREE, VFBGA-56
文件頁(yè)數(shù)： 6/82頁(yè)
文件大?。?/td> 1303K
代理商： M58LR128FB95ZB6E
M58LR128FT, M58LR128FB
14/82
■
The second latches the address and data to
be programmed and starts the Program/Erase
Controller.
Once the programming has started, read opera-
tions in the bank being programmed output the
Status Register content.
During a Program operation, the bank containing
the Word being programmed will only accept the
Read Array, Read Status Register, Read Electron-
ic Signature, Read CFI Query and the Program/
Erase Suspend command, all other commands
will be ignored. A Read Array command is re-
quired to return the bank to Read Array mode.
Refer to Dual Operations section for detailed infor-
mation about simultaneous operations allowed in
banks not being programmed.
Typical Program
times are given in Table
The Program operation aborts if Reset, RP, goes
to VIL. As data integrity cannot be guaranteed
when the Program operation is aborted, the Word
must be reprogrammed.
chart and Pseudo Code, for the flowchart for using
the Program command.
Buffer Program Command
The Buffer Program Command makes use of the
device’s 32-Word Write Buffer to speed up pro-
gramming. Up to 32 Words can be loaded into the
Write Buffer. The Buffer Program command dra-
matically reduces in-system programming time
compared to the standard non-buffered Program
command.
Four successive steps are required to issue the
Buffer Program command.
1.
The first Bus Write cycle sets up the Buffer
Program command. The setup code can be
addressed to any location within the targeted
block.
After the first Bus Write cycle, read operations in
the bank will output the contents of the Status
Register. Status Register bit SR7 should be read
to check that the buffer is available (SR7 = 1). If
the buffer is not available (SR7 = 0), re-issue the
Buffer Program command to update the Status
Register contents.
2.
The second Bus Write cycle sets up the
number of Words to be programmed. Value n
is written to the same block address, where
n+1 is the number of Words to be
programmed.
3.
Use n+1 Bus Write cycles to load the address
and data for each Word into the Write Buffer.
Addresses must lie within the range from the
start address to the start address + n.
Optimum performance is obtained when the
start address corresponds to a 32 Word
boundary. If the start address is not aligned to
a 32 word boundary, the total programming
time is doubled
4.
The final Bus Write cycle confirms the Buffer
Program command and starts the program
operation.
All the addresses used in the Buffer Program op-
eration must lie within the same block.
Invalid address combinations or failing to follow
the correct sequence of Bus Write cycles will set
an error in the Status Register and abort the oper-
ation without affecting the data in the memory ar-
ray.
If the Status Register bits SR4 and SR5 are set to
'1', the Buffer Program Command is not accepted.
Clear the Status Register before re-issuing the
command.
If the block being programmed is protected an er-
ror will be set in the Status Register and the oper-
ation will abort without affecting the data in the
memory array.
During Buffer Program operations the bank being
programmed will only accept the Read Array,
Read Status Register, Read Electronic Signature,
Read CFI Query and the Program/Erase Suspend
command, all other commands will be ignored.
Refer to Dual Operations section for detailed infor-
mation about simultaneous operations allowed in
banks not being programmed.
See Appendix C, figure 27, Buffer Program Flow-
chart and Pseudo Code, for a suggested flowchart
on using the Buffer Program command.
Buffer Enhanced Factory Program Command
The Buffer Enhanced Factory Program command
has been specially developed to speed up pro-
gramming in manufacturing environments where
the programming time is critical.
It is used to program one or more Write Buffer(s)
of 32 Words to a block. Once the device enters
Buffer Enhanced Factory Program mode, the
Write Buffer can be reloaded any number of times
as long as the address remains within the same
block. Only one block can be programmed at a
time.
The use of the Buffer Enhanced Factory Program
command requires certain operating conditions:
■
VPP must be set to VPPH
■
VDD must be within operating range
■
Ambient temperature, TA must be 25°C ± 5°C
■
The targeted block must be unlocked
■
The start address must be aligned with the
start of a 32 Word buffer boundary
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M58LR128FB95ZB6F 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:128 Mbit (8Mb x16, Multiple Bank, Multi-Level, Burst) 1.8V Supply Flash Memory
M58LR128FB95ZB6T 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:128 Mbit (8Mb x16, Multiple Bank, Multi-Level, Burst) 1.8V Supply Flash Memory
M58LR128FT 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:128 Mbit (8Mb x16, Multiple Bank, Multi-Level, Burst) 1.8V Supply Flash Memory
M58LR128FT85ZB6 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:128 Mbit (8Mb x16, Multiple Bank, Multi-Level, Burst) 1.8V Supply Flash Memory
M58LR128FT85ZB6E 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:128 Mbit (8Mb x16, Multiple Bank, Multi-Level, Burst) 1.8V Supply Flash Memory
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