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參數(shù)資料
| 型號： | M38C24M4A-XXXFP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 5 MHz, MICROCONTROLLER, PQFP64 |
| 封裝： | 14 X 14 MM, 0.80 MM PITCH, PLASTIC, LQFP-64 |
| 文件頁數(shù)： | 96/102頁 |
| 文件大小： | 1369K |
| 代理商： | M38C24M4A-XXXFP |
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Rev.2.00
May 28, 2004
page 93 of 100
38C2 Group (A Version)
APPENDIX
NOTES ON PROGRAMMING
1. Processor status register
(1) Initializing of processor status register
Flags which affect program execution must be initialized after a re-
set.
In particular, it is essential to initialize the T and D flags because they
have an important effect on calculations.
<Reason>
After a reset, the contents of the processor status register (PS) are
undefined except for the I flag which is “1”.
Reset
↓
Initializing of flags
↓
Main program
Fig.1 Initialization of processor status register
(2) How to reference the processor status register
To reference the contents of the processor status register (PS), ex-
ecute the PHP instruction once then read the contents of (S+1). If
necessary, execute the PLP instruction to return the PS to its original
status.
A NOP instruction should be executed after every PLP instruction.
Fig. 2 Sequence of PLP instruction execution
PLP instruction execution
↓
NOP
Fig. 3 Stack memory contents after PHP instruction execution
2. Decimal calculations
(1) Execution of decimal calculations
The ADC and SBC are the only instructions which will yield proper
decimal notation, set the decimal mode flag (D) to “1” with the SED
instruction. After executing the ADC or SBC instruction, execute an-
other instruction before executing the SEC, CLC, or CLD instruction.
(S)
(S)+1
Stored PS
(2) Notes on status flag in decimal mode
When decimal mode is selected, the values of three of the flags in
the status register (the N, V, and Z flags) are invalid after a ADC or
SBC instruction is executed.
The carry flag (C) is set to “1” if a carry is generated as a result of the
calculation, or is cleared to “0” if a borrow is generated. To determine
whether a calculation has generated a carry, the C flag must be ini-
tialized to “0” before each calculation. To check for a borrow, the C
flag must be initialized to “1” before each calculation.
Set D flag to “1”
↓
ADC or SBC instruction
↓
NOP instruction
↓
SEC, CLC, or CLD instruction
Fig. 4 Status flag at decimal calculations
3. JMP instruction
When using the JMP instruction in indirect addressing mode, do not
specify the last address on a page as an indirect address.
4. BRK instruction
When the BRK instruction is executed with the following conditions
satisfied, the interrupt execution is started from the address of
interrupt vector which has the highest priority.
Interrupt request bit and interrupt enable bit are set to “1”.
Interrupt disable flag (I) is set to “1” to disable interrupt.
5. Multiplication and Division Instructions
The index X mode (T) and the decimal mode (D) flags do not affect
the MUL and DIV instruction.
The execution of these instructions does not change the contents
of the processor status register.
6. Read-modify-write instruction
Do not execute a read-modify-write instruction to the read invalid
address (memory and SFR).
The read-modify-write instruction operates in the following sequence:
read one-byte of data from memory, modify the data, write the data
back to original memory. The following instructions are classified as
the read-modify-write instructions in the 740 Family.
Bit management instructions: CLB, SEB
Shift and rotate instructions: ASL, LSR, ROL, ROR, RRF
Add and subtract instructions: DEC, INC
Logical operation instructions (1’s complement): COM
Add and subtract/logical operation instructions (ADC, SBC, AND,
EOR, and ORA) when T flag = “1” operate in the way as the read-
modify-write instruction. Do not execute the read invalid memory and
SFR.
<Reason>
When the read-modify-write instruction is executed to read invalid
memory and SFR, the instruction may cause the following conse-
quence: the instruction reads unspecified data from the memory due
to the read invalid condition. Then the instruction modifies this un-
specified data and writes the data to the memory. The result will be
random data written to the memory or some unexpected event.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M38C24M4-XXXFP | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| M38C24M4-XXXHP | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| M38C24M6-051HP | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| M38C24M6-XXXFP | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| M38C24M6-XXXHP | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
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