參數(shù)資料
型號(hào)： M38C24M4A-XXXFP
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 5 MHz, MICROCONTROLLER, PQFP64
封裝： 14 X 14 MM, 0.80 MM PITCH, PLASTIC, LQFP-64
文件頁數(shù)： 50/102頁
文件大?。?/td> 1369K
代理商： M38C24M4A-XXXFP
Rev.2.00
May 28, 2004
page 51 of 100
38C2 Group (A Version)
Fig. 53 State transitions of system clock
XIN oscillation, XCIN stop
CM7=0, CM6=1
Frequency/2 mode
System clock
φ : f(XIN)/2
CM5=1CM4=0
CM7=“0”
CM6=“1”
Low-speed mode
System clock
φ : f(XCIN)/2
XIN stop, XCIN oscillation
CM7=0, CM6=0
Low-power dissipation mode
System clock
φ : f(XCIN)/2
CM7=“1”
CM7=“0”
CM6=“0”
System clock = Main clock f(XIN)
Reset
CM5 CM4 : Main clock division ratio selection bits
00: XIN/8 (frequency/8)
01: XIN/4 (frequency/4)
10: XIN/2 (frequency/2)
11: Not available
CM7 CM6 : System clock control bits
00: XIN stop, XCIN oscillation, system clock = XCIN
01: XIN oscillation, XCIN stop, system clock = XIN
10: XIN oscillation, XCIN oscillation, system clock = XCIN
11: XIN oscillation, XCIN oscillation, system clock = XIN
CPU mode register
(CPUM : address 003B16)
b7
b4
1: When the mode is switched from frequency/2/4/8 to the low-speed mode, or the opposite is
performed, change CM7 at first, and then, change CM6 after the oscillation of the changed mode
is stabilized.
2: The all modes can be switched to the stop mode or the wait mode and return to the source mode
when the stop mode or the wait mode is ended.
3: Timer and LCD operate in the wait mode.
4: When the stop mode is ended, a delay time can be set by connecting timer 1 and timer 2.
Notes
Frequency/4 mode
System clock
φ : f(XIN)/4
CM5=0CM4=1
Frequency/8 mode
System clock
φ : f(XIN)/8
CM5=0CM4=0
CM7=“1”
XIN oscillation, XCIN oscillation
CM7=1, CM6=1
Frequency/2 mode
System clock
φ : f(XIN)/2
CM5=1CM4=0
Frequency/8 mode
Frequency/4 mode
System clock
φ : f(XIN)/4
CM5=0CM4=1
System clock
φ : f(XIN)/8
CM5=0CM4=0
System clock
= Sub clock f(XCIN)
XIN oscillation, XCIN oscillation
CM7=1, CM6=0
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參數(shù)描述
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