參數(shù)資料
型號(hào): M37920FCCGP
廠商: Mitsubishi Electric Corporation
英文描述: Single Chip 16 Bits CMOS Microcomputer(16位單片機(jī))
中文描述: 單片微機(jī)16位的CMOS(16位單片機(jī))
文件頁數(shù): 56/158頁
文件大?。?/td> 1261K
代理商: M37920FCCGP
M37920FCCGP, M37920FCCHP
M37920FGCGP, M37920FGCHP
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change.
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER FLASH MEMORY VERSION
MITSUBISHI MICROCOMPUTERS
56
Serial I/O mode select bits
0 0 0 : Programmable I/O port (Serial I/O is invalid.)
0 0 1 : Clock synchronous
1 0 0 : 7-bit UART
1 0 1 : 8-bit UART
1 1 0 : 9-bit UART
Internal/External clock select bit
0 : Internal clock
1 : External clock
Stop bit length select bit (Valid in UART mode.)
0 : 1 stop bit
1 : 2 stop bits
Odd/Even parity select bit (Valid in UART mode with the parity enable bit = “1”.)
0 : Odd parity
1 : Even parity
Parity enable bit (Valid in UART mode)
0 : No parity
1 : With parity
Sleep select bit (Valid in UART mode)
0 : No sleep
1 : Sleep
7 6 5 4 3 2 1 0
UART 0 Transmit/Receive mode register
UART 1 Transmit/Receive mode register
Addresses
30
16
38
16
SERIAL I/O PORTS
Two independent serial I/O ports are provided. Figure 50 shows a
block diagram of the serial I/O ports.
Bits 0 to 2 of the UARTi(i = 0,1) transmit/receive mode register
shown in Figure 51 are used to determine whether to use port P8 as
a programmable I/O port, clock synchronous serial I/O port, or asyn-
chronous (UART) serial I/O port which uses start and stop bits.
Figures 52 and 53 show the block diagrams of the receiver/transmit-
ter.
Figure 54 shows the bit configuration of the UARTi transmit/receive
control register.
Each communication method is described below.
Fig. 51 Bit configuration of UARTi transmit/receive mode register
Fig. 50 Block diagram of serial I/O port
UARTi receive register
T
X
D
i
R
X
D
i
Receive
control
circuit
Transmit
control
circuit
UARTi transmit register
1/16 divider
Clock synchronous
1/2 divider
1/(n + 1) divider
1/16 divider
Clock synchronous
Clock synchronous
Transfer clock
Transfer clock
UARTi
transmit buffer register
UART0 (Addresses 33
16
, 32
16
)
UART1 (Addresses 3B
16
, 3A
16
)
UART
Clock synchronous (when internal clock selected)
BRG count source select bits
f
2
f
16
f
64
f
512
(Internal clock)
UART
D
7
D
6
D
5
D
4
D
3
D
2
D
1
UARTi
receive buffer register
D
0
D
7
D
8
D
6
D
5
D
4
D
3
D
2
D
1
D
0
0 D
8
0
0
0
0
0
0
BRGi
UART0 (Addresses 37
16,
36
16
)
UART1 (Addresses 3F
16
, 3E
16
)
CTS
0
/RTS
0
Clock synchronous
(External clock)
n = a value set into the UARTi baud rate register (BRGi)
CLK
1
CTS
0
CTS
0
/CLK
1
CLK
0
Data bus (even)
Data bus (odd)
Bit converter
Data bus (odd)
Data bus (even)
Bit converter
相關(guān)PDF資料
PDF描述
M37920FCCHP Single Chip 16 Bits CMOS Microcomputer(16位單片機(jī))
M37920FGCHP Single Chip 16 Bits CMOS Microcomputer(16位單片機(jī))
M3802 Single Chip 8 Bits Microcomputer(8位單片機(jī))
M3820 Single Chip 8 Bits Microcomputer(8位單片機(jī))
M3822 Single Chip 8 Bits Microcomputer(8位單片機(jī))
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