參數(shù)資料
型號(hào): M37902FGCHP
元件分類(lèi): 微控制器/微處理器
英文描述: 16-BIT, FLASH, 26 MHz, MICROCONTROLLER, PQFP100
封裝: 14 X 14 MM, 0.50 MM PITCH, PLASTIC, LQFP-100
文件頁(yè)數(shù): 93/143頁(yè)
文件大?。?/td> 1148K
代理商: M37902FGCHP
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53
M37902FCCHP, M37902FGCHP, M37902FJCHP
MITSUBISHI MICROCOMPUTERS
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
When bit 2 of the timer Ai mode register is “1”, the output is gener-
ated from TAiOUT pin. The output is toggled each time the contents
of the counter reaches to 000016. When the contents of the count
start bit is “0”, “L” is output from TAiOUT pin.
When bit 2 is “0”, TAiOUT can be used as a normal port pin. When bit
4 is “0”, TAiIN can be used as a normal port pin.
When bit 4 is “1”, counting is performed only while the input signal
from the TAiIN pin is “H” or “L” as shown in Figure 45. Therefore, this
can be used to measure the pulse width of the TAiIN input signal.
Whether to count while the input signal is “H” or while it is “L” is de-
termined by bit 3. If bit 3 is “1”, counting is performed while the TAiIN
pin input signal is “H” and if bit 3 is “0”, counting is performed while it
is “L”.
Note that, the duration of “H” or “L” on the TAiIN pin must be 2 or
more cycles of the timer count source.
When data is written to timer Ai register with timer Ai halted, the
same data is also written to the reload register and the counter.
When data is written to timer Ai which is busy, the data is written to
the reload register, but not to the counter. The new data is reloaded
from the reload register to the counter at the next reload time and
counting continues. The contents of the counter can be read at any
time.
When the value set in the timer Ai register is n, the timer frequency
division ratio is 1/(n+1).
0 0 : Always “00” in timer mode
0 : No pulse output (TAiOUT is normal port pin.)
1 : Pulse output (TAiOUT is pulse output pin.) (Note)
0
× : No gate function (TAiIN is normal port pin.)
1 0 : Count only while TAiIN input is “L”.
1 1 : Count only while TAiIN input is “H”.
0 : Always “0” in timer mode.
Clock source select bits
See Table 12.
Timer A0 mode register
Timer A1 mode register
Timer A2 mode register
Timer A3 mode register
Timer A4 mode register
7
00
6543210
Addresses
5616
5716
5816
5916
5A16
0
Note: When using pins TA2OUT and TA3OUT as pulse output pins, do not select pins KI0 and KI2.
Because they are key input interrupt pins and are multiplexed with pins TA2OUT and TA3OUT.
Fig. 43 Bit configuration of timer Ai mode register during timer mode
Fig. 42 Bit configuration of timer A clock division select register
Table 12. Relationship between timer A clock division select bits,
clock source select bits, and count source
Timer A clock division select bit
(See Table 12.)
76543210
Timer A clock division select register
Address
4516
“0” at read.
Clock source select bits
(bits 7 and 6 at addresses
5616 to 5A16)
1 0
0 0
0 1
Timer A clock division select bits
(bits 1 and 0 at address 4516)
f2
f16
f64
1 1
f512
00
f1
f16
f64
f4096
01
f1
f64
f512
f4096
10
11
Do not
select.
Note: Timers A0 to A4 use the same clock, which is selected by the
timer A clock division select bits.
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