參數(shù)資料
型號(hào): M37902FGCHP
元件分類(lèi): 微控制器/微處理器
英文描述: 16-BIT, FLASH, 26 MHz, MICROCONTROLLER, PQFP100
封裝: 14 X 14 MM, 0.50 MM PITCH, PLASTIC, LQFP-100
文件頁(yè)數(shù): 77/143頁(yè)
文件大?。?/td> 1148K
代理商: M37902FGCHP
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39
M37902FCCHP, M37902FGCHP, M37902FJCHP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
Bus cycle:
1
φ + 1φ
1
φ + 2φ
1
φ + 3φ
2
φ + 2φ
2
φ + 3φ
2
φ + 4φ
3
φ + 3φ
3
φ + 4φ
(Selected by bits
2, 3 at address
5E16 and bit 0 at
address 5F16.)
Determined by
pin BYTE’s level
Valid (Selected by
bit 2 at address
5F16.)
Not available.
Available.
Not available.
Available.
CS3
Banks 216
to FE16
128 Kbytes,
256 Kbytes,
512 Kbytes,
1 Mbytes,
2 Mbytes,
4 Mbytes,
or 8 Mbytes
Bus cycle:
1
φ + 1φ
1
φ + 2φ
1
φ + 3φ
2
φ + 2φ
2
φ + 3φ
2
φ + 4φ
3
φ + 3φ
3
φ + 4φ
(Selected by bits
0, 1 at address
8616 and bit 3 at
address 8716.)
When BYTE =
VSS level, 8-bit
width or 16-bit
width can be
selected arbitrary
(Note 1).
(Selected by bit 2
at address 8616.)
Valid (Selected by
bit 2 at address
5F16 and bit 3 at
address 8616.)
Available.
Not available.
Available.
Bus cycle:
1
φ + 1φ
1
φ + 2φ
1
φ + 3φ
2
φ + 2φ
2
φ + 3φ
2
φ + 4φ
3
φ + 3φ
3
φ + 4φ
(Selected by bits 0, 1 at addresses
8216, 8416 and bit 3 at addresses
8316, 8516.)
When BYTE = VSS level, 8-bit width
or 16-bit width can be selected
arbitrary (Note 1). (Selected by bit 2
at addresses 8216, 8416.)
Valid (Selected by bit 2 at address
5F16 and bit 3 at addresses 8216,
8416.)
Available.
CS1: Not available.
CS2: Available. (Note 4)
Available.
Space where start
address can be set
Block size
Bus cycle
External data bus
width
RDY control
Burst ROM access
(Notes 2, 3)
Recovery cycle
insertion
Area multiplexed bus
access (Note 3)
Address output
selection (Note 5)
Bus cycle:
1
φ + 1φ
1
φ + 2φ
1
φ + 3φ
2
φ + 2φ
2
φ + 3φ
2
φ + 4φ
3
φ + 3φ
3
φ + 4φ
(Selected by bits 0, 1 at address
8016 and bit 3 at address 8116.)
Determined by pin BYTE’s level.
Valid (Selected by bit 2 at address
5F16 and bit 3 at address 8016.)
Available.
Not available.
Available.
CS0
Mode 0
Banks 216
to FE16
128 Kbytes,
256 Kbytes,
512 Kbytes,
1 Mbytes,
2 Mbytes,
4 Mbytes,
or 8 Mbytes
Mode 1
Bank 016
128 Kbytes,
256 Kbytes,
512 Kbytes,
1 Mbytes,
2 Mbytes,
4 Mbytes,
or 8 Mbytes
CS1, CS2
Mode 0
Banks 216
to FE16
128 Kbytes,
256 Kbytes,
512 Kbytes,
1 Mbytes,
2 Mbytes,
4 Mbytes,
or 8 Mbytes
Mode 1
Bank 016
4 Kbytes
or 8 Kbytes
External area except
for CS0 to CS3
Table 7. Function of areas CS0 to CS3
Notes 1: When BYTE = Vcc level, the external data bus width is fixed to 8 bits.
2: Burst ROM access is valid only when the external data bus width is 16 bits at instruction prefetch.
3: Burst ROM access and area multiplexed bus access cannot be used at the same time.
4: Valid only when area CS2 is accessed with the 8-bit external data bus width.
5: Selected by the address output select bit (bit 4 at address 6316). The address output selection for each area is not available.
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