參數(shù)資料
型號(hào): M37641F8FP
元件分類: 微控制器/微處理器
英文描述: 8-BIT, FLASH, 12 MHz, MICROCONTROLLER, PQFP80
封裝: 14 X 20 MM, 0.80 MM, PLASTIC, QFP-80
文件頁數(shù): 109/140頁
文件大?。?/td> 1694K
代理商: M37641F8FP
7641 Group
Rev.4.00
Aug 28, 2006
page 68 of 135
REJ03B0191-0400
RESET CIRCUIT
To reset the microcomputer, RESET pin should be held at an “L”
level for 20 cycles or more of
φ. Then the RESET pin is returned to
an “H” level, and reset is released. They must be performed when
the power source voltages are between 3.00 V and 3.60 V or 4.15
V and 5.25 V.
After the reset is completed, the program starts from the address
contained in address FFFA16 (high-order byte) and address
FFFB16 (low-order byte).
After oscillation has restarted, the timers 1 and 2 secures waiting
time for the internal clock
φ oscillation stabilized automatically by
setting the timer 1 to “FF16” and timer 2 to “0116”. The internal
clock
φ retains “H” level until Timer 2’s underflow and it cannot be
supplied until the underflow.
The pins state during reset are follows:
When CNVss = “H”
Ports P0, P1, P33 to P37
: Outputting
Pins other than above mentioned ports
: Inputting
When CNVss = “L”
All pins
: Inputting.
Fig. 62 Reset sequence
Fig. 61 Reset circuit example
(Note)
0.2VCC
0V
Poweron
VCC
RESET
VCC
RESET
Power source
voltage detection
circuit
Power source
voltage
Reset input
voltage
Note : Reset release voltage ; Vcc = 3.00 or 4.15 V
RESET
Internal
reset
Data
φ
Address
SYNC
XIN: 512 clock cycles
?
FFFA
FFFB
ADH,L
?
ADL
ADH
Reset address from
the vector table.
Notes: The question marks (?) indicate an undefined state that depends on the previous state.
相關(guān)PDF資料
PDF描述
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