參數(shù)資料
型號: LPC2917
廠商: NXP Semiconductors N.V.
元件分類: 32位微控制器
英文描述: ARM9 microcontroller with CAN and LIN
中文描述: 具有CAN和LIN的ARM9微控制器
文件頁數(shù): 3/68頁
文件大?。?/td> 384K
代理商: LPC2917
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LPC2917_19_1
NXP B.V. 2007. All rights reserved.
Preliminary data sheet
Rev. 1.01 — 15 November 2007
3 of 68
NXP Semiconductors
LPC2917/19
ARM9 microcontroller with CAN and LIN
2.4 On-chip static RAM
In addition to the two 16 kB TCMs the LPC2917/19 includes two static RAM memories:
one of 32 kB and one of 16 kB. Both may be used for code and/or data storage. Each
internal SRAM has its own controller, so both memories can be accessed simultaneously
from different AHB system bus layers.
3.
Features
3.1 General
ARM968E-S processor at 80 MHz maximum
Multi-layer AHB system bus at 80 MHz with three separate layers
On-chip memory:
Two Tightly Coupled Memories (TCM), 16 kB Instruction (ITCM), 16 kB Data TCM
(DTCM)
Two separate internal Static RAM (SRAM) instances; 32 kB SRAM and 16 kB
SRAM
Up to 768 kB flash-program memory
Two-channel CAN controller supporting Full-CAN and extensive message filtering
Two LIN master controllers with full hardware support for LIN communication
Two 550 UARTs with 16-byte Tx and Rx FIFO depths
Three full-duplex Q-SPIs with four slave-select lines; 16 bits wide; 8 locations deep; Tx
FIFO and Rx FIFO
Four 32-bit timers each containing four capture-and-compare registers linked to I/Os
32-bit watchdog with timer change protection, running on safe clock.
Up to 108 general-purpose I/O pins with programmable pull-up, pull-down or bus
keeper
Vectored Interrupt Controller (VIC) with 16 priority levels
Two 8-channel 10-bit ADCs provide a total of up to 16 analog inputs, with conversion
times as low as 2.44
μ
s per channel. Each channel provides a compare function to
minimize interrupts
Up to 24 level-sensitive external interrupt pins, including CAN and LIN wake- up
features
External Static Memory Controller (SMC) with eight memory banks; up to 32-bit data
bus; up to 24-bit address bus
Processor wake-up from power-down via external interrupt pins; CAN or LIN activity
Flexible Reset Generator Unit (RGU) able to control resets of individual modules
Flexible Clock-Generation Unit (CGU) able to control clock frequency of individual
modules
On-chip very low-power ring oscillator; fixed frequency of 0.4 MHz; always on to
provide a Safe_Clock source for system monitoring
On-chip crystal oscillator with operating range from 10 MHz to 50 MHz - max. PLL
input 15 MHz
On-chip PLL allows CPU operation up to a maximum CPU rate of 80 MHz
Generation of up to 10 base clocks
Seven fractional dividers
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