參數(shù)資料
型號: LPC2917
廠商: NXP Semiconductors N.V.
元件分類: 32位微控制器
英文描述: ARM9 microcontroller with CAN and LIN
中文描述: 具有CAN和LIN的ARM9微控制器
文件頁數(shù): 48/68頁
文件大?。?/td> 384K
代理商: LPC2917
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LPC2917_19_1
NXP B.V. 2007. All rights reserved.
Preliminary data sheet
Rev. 1.01 — 15 November 2007
48 of 68
NXP Semiconductors
LPC2917/19
ARM9 microcontroller with CAN and LIN
8.8.5.3
RGU pin description
The RGU module in the LPC2917/19 has the following pins.
Table 26
shows the RGU
pins.
Table 26.
Symbol
8.8.6
Power Management Unit (PMU)
8.8.6.1
Overview
This module enables software to actively control the system’s power consumption by
disabling clocks not required in a particular operating mode.
Using the base clocks from the CGU as input, the PMU generates branch clocks to the
rest of the LPC2917/19. Output clocks branched from the same base clock are phase-
and frequency-related. These branch clocks can be individually controlled by software
programming.
The key features are:
Individual clock control for all LPC2917/19 sub-modules
Activates sleeping clocks when a wake-up event is detected
Clocks can be individually disabled by software
Supports AHB master-disable protocol when AUTO mode is set
Disables wake-up of enabled clocks when power-down mode is set
Activates wake-up of enabled clocks when a wake-up event is received
Status register is available to indicate if an input base clock can be safely switched off
(i.e. all branch clocks are disabled)
8.8.6.2
Description
The PMU controls all internal clocks of the device for power-mode management. With
some exceptions, each branch clock can be switched on or off individually under control of
software register bits located in its individual configuration register. Some branch clocks
controlling vital parts of the device operate in a fixed mode.
Table 27
shows which mode-
control bits are supported by each branch clock.
By programming the configuration register the user can control which clocks are switched
on or off, and which clocks are switched off when entering power-down mode.
Note that the standby-wait-for-interrupt instructions of the ARM968E-S processor (putting
the ARM CPU into a low-power state) are not supported. Instead putting the ARM CPU
into power-down should be controlled by disabling the branch clock for the CPU.
Remark:
For any disabled branch clocks to be re-activated their corresponding base
clocks must be running (controlled by the CGU).
Table 27
shows the relation between branch and base clocks, see also
Section 7.2.1
.
Every branch clock is related to one particular base clock: it is not possible to switch the
source of a branch clock in the PMU.
RGU pins
Directio
n
IN
Description
RSTN
external reset input, Active LOW; pulled up internally
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