參數(shù)資料
型號: LPC2917
廠商: NXP Semiconductors N.V.
元件分類: 32位微控制器
英文描述: ARM9 microcontroller with CAN and LIN
中文描述: 具有CAN和LIN的ARM9微控制器
文件頁數(shù): 18/68頁
文件大?。?/td> 384K
代理商: LPC2917
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LPC2917_19_1
NXP B.V. 2007. All rights reserved.
Preliminary data sheet
Rev. 1.01 — 15 November 2007
18 of 68
NXP Semiconductors
LPC2917/19
ARM9 microcontroller with CAN and LIN
Remark:
If the programmed number of wait-states is more than three, flash-data reading
cannot be performed at full speed (i.e. with zero wait-states at the AHB bus) if speculative
reading is active.
8.2 External static memory controller
8.2.1
Overview
The LPC2917/19 contains an external Static Memory Controller (SMC) which provides an
interface for external (off-chip) memory devices.
Key features are:
Supports static memory-mapped devices including RAM, ROM, flash, burst ROM and
external I/O devices
Asynchronous page-mode read operation in non-clocked memory subsystems
Asynchronous burst-mode read access to burst-mode ROM devices
Independent configuration for up to eight banks, each up to 16 MB
Programmable bus-turnaround (idle) cycles (one to 16)
Programmable read and write wait states (up to 32), for static RAM devices
Programmable initial and subsequent burst-read wait state for burst-ROM devices
Programmable write protection
Programmable burst-mode operation
Programmable external data width: 8-bit, 16-bit or 32-bit
Programmable read-byte lane enable control
8.2.2
Description
The SMC simultaneously supports up to eight independently configurable memory banks.
Each memory bank can be 8, 16 or 32 bits wide and is capable of supporting SRAM,
ROM, burst-ROM memory or external I/O devices.
A separate chip-select output is available for each bank. The chip-select lines are
configurable to be active HIGH or LOW. Memory-bank selection is controlled by memory
addressing.
Table 10
shows how the 32-bit system address is mapped to the external bus
memory base addresses, chip selects and bank internal addresses.
Table 10.
32 bit
System
Address Bit
field
31 to 29
External memory-bank address bit description
Symbol
Description
BA[2:0]
external static-memory base address (three most significant bits);
the base address can be found in the memory map; see
Ref. 1
. This
field contains ’010’ when addressing an external memory bank.
chip-select address space for eight memory banks; see
[1]
always ’00’; other values are ’mirrors’ of the 16 MByte bank address
16-MByte memory banks address space
28 to 26
25 and 24
23 to 0
CS[2:0]
-
A[23:0]
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