參數(shù)資料
型號: LPC2460
廠商: NXP Semiconductors N.V.
英文描述: Flashless 16-bit/32-bit micro; Ethernet, CAN, ISP/IAP, USB 2.0 device/host/OTG, external memory interface
中文描述: 毛邊16-bit/32-bit微,以太網(wǎng),CAN,供應(yīng)商/國際檢察官聯(lián)合會,USB 2.0設(shè)備/主機/ OTG功能,外部存儲器接口
文件頁數(shù): 49/67頁
文件大小: 340K
代理商: LPC2460
LPC2460_0
NXP B.V. 2007. All rights reserved.
Preliminary data sheet
Rev. 00.01 — 5 October 2007
49 of 67
NXP Semiconductors
LPC2460
Fast communication chip
[1]
Conditions: V
SSA
= 0 V, V
DDA
= 3.3 V.
The ADC is monotonic, there are no missing codes.
[2]
[3]
The differential linearity error (E
D
) is the difference between the actual step width and the ideal step width. See
Figure 5
.
The integral non-linearity (E
L(adj)
) is the peak difference between the center of the steps of the actual and the ideal transfer curve after
appropriate adjustment of gain and offset errors. See
Figure 5
.
[4]
[5]
The offset error (E
O
) is the absolute difference between the straight line which fits the actual curve and the straight line which fits the
ideal curve. See
Figure 5
.
[6]
The gain error (E
G
) is the relative difference in percent between the straight line fitting the actual transfer curve after removing offset
error, and the straight line which fits the ideal transfer curve. See
Figure 5
.
[7]
The absolute error (E
T
) is the maximum difference between the center of the steps of the actual transfer curve of the non-calibrated
ADC and the ideal transfer curve. See
Figure 5
.
[8]
See
Figure 6
.
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