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參數(shù)資料
| 型號： | LPC2460 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Flashless 16-bit/32-bit micro; Ethernet, CAN, ISP/IAP, USB 2.0 device/host/OTG, external memory interface |
| 中文描述： | 毛邊16-bit/32-bit微，以太網(wǎng)，CAN，供應商/國際檢察官聯(lián)合會，USB 2.0設備/主機/ OTG功能，外部存儲器接口 |
| 文件頁數(shù)： | 31/67頁 |
| 文件大?。?/td> | 340K |
| 代理商： | LPC2460 |
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LPC2460_0
NXP B.V. 2007. All rights reserved.
Preliminary data sheet
Rev. 00.01 — 5 October 2007
31 of 67
NXP Semiconductors
LPC2460
Fast communication chip
–
Wake-on-LAN power management support allows system wake-up: using the
receive filters or a magic frame detection filter.
Physical interface:
–
Attachment of external PHY chip through standard MII or RMII interface.
–
PHY register access is available via the MIIM interface.
7.10 USB interface
The Universal Serial Bus (USB) is a 4-wire bus that supports communication between a
host and one or more (up to 127) peripherals. The Host Controller allocates the USB
bandwidth to attached devices through a token-based protocol. The bus supports hot
plugging and dynamic configuration of the devices. All transactions are initiated by the
Host Controller.
The LPC2460 USB interface includes a device, Host, and OTG Controller. Details on
typical USB interfacing solutions can be found in
Section 11.1 “Suggested USB interface
solutions” on page 55
7.10.1
USB device controller
The device controller enables 12 Mbit/s data exchange with a USB Host Controller. It
consists of a register interface, serial interface engine, endpoint buffer memory, and a
DMA controller. The serial interface engine decodes the USB data stream and writes data
to the appropriate endpoint buffer. The status of a completed USB transfer or error
condition is indicated via status registers. An interrupt is also generated if enabled. When
enabled, the DMA controller transfers data between the endpoint buffer and the USB
RAM.
7.10.1.1
Features
Fully compliant with
USB 2.0 specification
(full speed).
Supports 32 physical (16 logical) endpoints with a 4 kB endpoint buffer RAM.
Supports Control, Bulk, Interrupt and Isochronous endpoints.
Scalable realization of endpoints at run time.
Endpoint Maximum packet size selection (up to USB maximum specification) by
software at run time.
Supports SoftConnect and GoodLink features.
While USB is in the Suspend mode, LPC2460 can enter one of the reduced power
modes and wake up on USB activity.
Supports DMA transfers with the DMA RAM of 16 kB on all non-control endpoints.
Allows dynamic switching between CPU-controlled and DMA modes.
Double buffer implementation for Bulk and Isochronous endpoints.
7.10.2
USB Host Controller
The Host Controller enables full- and low-speed data exchange with USB devices
attached to the bus. It consists of register interface, serial interface engine and DMA
controller. The register interface complies with the OHCI specification.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| LPC2460_08 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Flashless 16-bit/32-bit micro; Ethernet, CAN, ISP/IAP, USB 2.0 device/host/OTG, external memory interface |
| LPC2460FBD208 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Flashless 16-bit/32-bit microcontroller; Ethernet, CAN, ISP/IAP, USB 2.0 device/host/OTG, external memory interface |
| LPC2460FBD208,551 | 功能描述:ARM微控制器 - MCU ARM7 USBHOST/ENET ROMLESS RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:72 MHz 程序存儲器大小:256 KB 數(shù)據(jù) RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風格:SMD/SMT |
| LPC2460FBD208-S | 制造商:NXP Semiconductors 功能描述:MCU 16-Bit/32-Bit LPC2000 ARM7TDMI-S RISC ROMLess 3.3V 208-Pin LQFP Tray |
| LPC2460FET208 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Flashless 16-bit/32-bit microcontroller; Ethernet, CAN, ISP/IAP, USB 2.0 device/host/OTG, external memory interface |
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