參數(shù)資料
型號: LPC2460
廠商: NXP Semiconductors N.V.
英文描述: Flashless 16-bit/32-bit micro; Ethernet, CAN, ISP/IAP, USB 2.0 device/host/OTG, external memory interface
中文描述: 毛邊16-bit/32-bit微,以太網(wǎng),CAN,供應(yīng)商/國際檢察官聯(lián)合會,USB 2.0設(shè)備/主機/ OTG功能,外部存儲器接口
文件頁數(shù): 32/67頁
文件大?。?/td> 340K
代理商: LPC2460
LPC2460_0
NXP B.V. 2007. All rights reserved.
Preliminary data sheet
Rev. 00.01 — 5 October 2007
32 of 67
NXP Semiconductors
LPC2460
Fast communication chip
7.10.2.1
Features
OHCI compliant.
Two downstream ports.
Supports per-port power switching.
7.10.3
USB OTG Controller
USB OTG (On-The-Go) is a supplement to the
USB 2.0 specification
that augments the
capability of existing mobile devices and USB peripherals by adding host functionality for
connection to USB peripherals.
The OTG Controller integrates the Host Controller, device controller, and a master-only
I
2
C interface to implement OTG dual-role device functionality. The dedicated I
2
C interface
controls an external OTG transceiver.
7.10.3.1
Features
Fully compliant with
On-The-Go supplement to the USB 2.0 Specification, Revision
1.0a
.
Hardware support for Host Negotiation Protocol (HNP).
Includes a programmable timer required for HNP and Session Request Protocol
(SRP).
Supports any OTG transceiver compliant with the
OTG Transceiver Specification
(CEA-2011), Rev. 1.0
.
7.11 CAN controller and acceptance filters
The Controller Area Network (CAN) is a serial communications protocol which efficiently
supports distributed real-time control with a very high level of security. Its domain of
application ranges from high-speed networks to low cost multiplex wiring.
The CAN block is intended to support multiple CAN buses simultaneously, allowing the
device to be used as a gateway, switch, or router between two of CAN buses in industrial
or automotive applications.
Each CAN controller has a register structure similar to the NXP SJA1000 and the PeliCAN
Library block, but the 8-bit registers of those devices have been combined in 32-bit words
to allow simultaneous access in the ARM environment. The main operational difference is
that the recognition of received Identifiers, known in CAN terminology as Acceptance
Filtering, has been removed from the CAN controllers and centralized in a global
Acceptance Filter.
7.11.1
Features
Two CAN controllers and buses.
Data rates to 1 Mbit/s on each bus.
32-bit register and RAM access.
Compatible with
CAN specification 2.0B, ISO 11898-1
.
Global Acceptance Filter recognizes 11-bit and 29-bit receive identifiers for all CAN
buses.
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