- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄369814 > LPC2460 (NXP Semiconductors N.V.) Flashless 16-bit/32-bit micro; Ethernet, CAN, ISP/IAP, USB 2.0 device/host/OTG, external memory interface PDF資料下載
參數(shù)資料
| 型號(hào)： | LPC2460 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Flashless 16-bit/32-bit micro; Ethernet, CAN, ISP/IAP, USB 2.0 device/host/OTG, external memory interface |
| 中文描述： | 毛邊16-bit/32-bit微，以太網(wǎng)，CAN，供應(yīng)商/國(guó)際檢察官聯(lián)合會(huì)，USB 2.0設(shè)備/主機(jī)/ OTG功能，外部存儲(chǔ)器接口 |
| 文件頁(yè)數(shù)： | 22/67頁(yè) |
| 文件大?。?/td> | 340K |
| 代理商： | LPC2460 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)當(dāng)前第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)
LPC2460_0
NXP B.V. 2007. All rights reserved.
Preliminary data sheet
Rev. 00.01 — 5 October 2007
22 of 67
NXP Semiconductors
LPC2460
Fast communication chip
P4[29]/BLS3/
MAT2[1]/RXD3
176
[1]
B10
[1]
I/O
O
O
I
I/O
O
I/O
O
O
P4[29] —
General purpose digital input/output pin.
BLS3 —
LOW active Byte Lane select signal 3.
MAT2[1] —
Match output for Timer 2, channel 1.
RXD3 —
Receiver input for UART3.
P4[30] —
General purpose digital input/output pin.
CS0 —
LOW active Chip Select 0 signal.
P4[31] —
General purpose digital input/output pin.
CS1 —
LOW active Chip Select 1 signal.
ALARM —
RTC controlled output. This is a 1.8 V pin. It goes HIGH when
a RTC alarm is generated.
USB_D
2 —
USB port 2 bidirectional D
line.
DBGEN —
JTAG interface control signal. Also used for boundary
scanning.
TDO —
Test Data out for JTAG interface.
TDI —
Test Data in for JTAG interface.
TMS —
Test Mode Select for JTAG interface.
TRST —
Test Reset for JTAG interface.
TCK —
Test Clock for JTAG interface. This clock must be slower than
1
6
of the CPU clock (CCLK) for the JTAG interface to operate.
RTCK —
JTAG interface control signal.
Note:
LOW on this pin while RESET is LOW enables ETM pins (P2[9:0])
to operate as Trace port after reset.
RSTOUT —
This is a 1.8 V pin. LOW on this pin indicates LPC2460 being
in Reset state.
external reset input:
A LOW on this pin resets the device, causing I/O
ports and peripherals to take on their default states, and processor
execution to begin at address 0. TTL with hysteresis, 5 V tolerant.
Input to the oscillator circuit and internal clock generator circuits.
Output from the oscillator amplifier.
Input to the RTC oscillator circuit.
Output from the RTC oscillator circuit.
ground:
0 V reference for the digital I/O pins.
P4[30]/CS0
187
[1]
B7
[1]
P4[31]/CS1
193
[1]
A4
[1]
ALARM
37
[8]
N1
[8]
USB_D
2
DBGEN
52
9
[1]
U1
F4
[1]
I/O
I
TDO
TDI
TMS
TRST
TCK
2
[1]
4
[1]
6
[1]
8
[1]
10
[1]
D3
[1]
C2
[1]
E3
[1]
D1
[1]
E2
[1]
O
I
I
I
I
RTCK
206
[1]
C3
[1]
I/O
RSTOUT
29
K3
O
RESET
35
[7]
M2
[7]
I
XTAL1
XTAL2
RTCX1
RTCX2
V
SSIO
44
[8]
46
[8]
34
[8]
36
[8]
33, 63,
77, 93,
114,
133,
148,
169,
189,
200
[9]
32, 84,
172
[9]
22
[10]
M4
[8]
N4
[8]
K2
[8]
L2
[8]
L3, T5,
R9,
P12,
N16,
H14,
E15,
A12,
B6, A2
[9]
K4, P10,
D12
[9]
J2
[10]
I
O
I
O
I
V
SSCORE
I
ground:
0 V reference for the core.
V
SSA
I
analog ground:
0 V reference. This should nominally be the same
voltage as V
SS
, but should be isolated to minimize noise and error.
Table 4.
Symbol
Pin description
…continued
Pin
Ball
Type
Description
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| LPC2880 | 16/32-bit ARM microcontrollers; 8 kB cache, up to 1 MB flash, Hi-Speed USB 2.0 device, and SDRAM memory interface |
| LPC2880FET180 | 16/32-bit ARM microcontrollers; 8 kB cache, up to 1 MB flash, Hi-Speed USB 2.0 device, and SDRAM memory interface |
| LPC2888 | 16/32-bit ARM microcontrollers; 8 kB cache, up to 1 MB flash, Hi-Speed USB 2.0 device, and SDRAM memory interface |
| LPC2888FET180 | 16/32-bit ARM microcontrollers; 8 kB cache, up to 1 MB flash, Hi-Speed USB 2.0 device, and SDRAM memory interface |
| LPC2917 | ARM9 microcontroller with CAN and LIN |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LPC2460_08 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Flashless 16-bit/32-bit micro; Ethernet, CAN, ISP/IAP, USB 2.0 device/host/OTG, external memory interface |
| LPC2460FBD208 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Flashless 16-bit/32-bit microcontroller; Ethernet, CAN, ISP/IAP, USB 2.0 device/host/OTG, external memory interface |
| LPC2460FBD208,551 | 功能描述:ARM微控制器 - MCU ARM7 USBHOST/ENET ROMLESS RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:72 MHz 程序存儲(chǔ)器大小:256 KB 數(shù)據(jù) RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風(fēng)格:SMD/SMT |
| LPC2460FBD208-S | 制造商:NXP Semiconductors 功能描述:MCU 16-Bit/32-Bit LPC2000 ARM7TDMI-S RISC ROMLess 3.3V 208-Pin LQFP Tray |
| LPC2460FET208 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Flashless 16-bit/32-bit microcontroller; Ethernet, CAN, ISP/IAP, USB 2.0 device/host/OTG, external memory interface |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。