參數(shù)資料
型號(hào): LP3972
廠商: National Semiconductor Corporation
英文描述: Power Management Unit for Advanced Application Processors
中文描述: 電源管理單元的高級(jí)應(yīng)用處理器
文件頁數(shù): 44/59頁
文件大?。?/td> 1072K
代理商: LP3972
I
2
C Compatible Interface
(Continued)
INTERRUPT STATUS REGISTER ISRA
This register specifies the status bits for the interrupts generated by the PMIC. Thermal warning of the IC, GPIO1, GPIO2,
PWR_ON pin, TEST_JIG factory programmable on signal, and the SPARE pin.
Interrupt Status Register ISRA 8h’88
Bit
7
6
5
4
3
2
1
0
Designation
Reset Value
Reserved
0
T125
0
GPI2
0
GPI1
0
WU3L
0
WUPS
0
WUPT
0
WUPS
0
Interrupt Status Register ISRA 8h’88 Definitions
Bit
7
6
Access
R
Name
T125
Description
Reserved
Status bit for thermal warning PMIC T
>
125C
0 = PMIC Temp.
<
125C
1 = PMIC Temp.
>
125C
Status bit for the input read in from GPIO 2 when set as Input
0 = GPI2 Logic Low
1 = GPI2 Logic High
Status bit for the input read in from GPIO 1 when set as Input
0 = GPI1 Logic Low
1 = GPI1 Logic High
PWR_ON Pin long pulse Wake Up Status
0 = No wake up event
1 = Long pulse wake up event
PWR_ON Pin Short pulse Wake Up Status
0 = No wake up event
1 = Short pulse wake up event
TEST_JIG Pin Wake Up Status
0 = No wake up event
1 = Wake up event
SPARE Pin Wake Up Status
0 = No wake up event
1 = Wake up event
5
R
GPI2
4
R
GPI1
3
R
WU3L
2
R
WUPS
1
R
WUPT
0
R
WUPS
L
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LP3972_08 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Power Management Unit for Advanced Application Processors
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