參數(shù)資料
型號: LP3972
廠商: National Semiconductor Corporation
英文描述: Power Management Unit for Advanced Application Processors
中文描述: 電源管理單元的高級應用處理器
文件頁數(shù): 41/59頁
文件大?。?/td> 1072K
代理商: LP3972
I
2
C Compatible Interface
(Continued)
LOGIC OUTPUT ENABLE REGISTER (LOER) 8H’84
Bit
7
6*
5*
4*
3*
2*
1*
0*
Designation
Reset Value
Note:
** denotes one time factory programmable EPROM registers for default values
Reserved
0
B3ENC
1
B2ENC
1
B1ENC
0
L5EC
0
L4EC
1
L3EC
1
L2EC
1
LOGIC OUTPUT ENABLE REGISTER (LOER) DEFINITIONS 8H’84
Bit
7
6
Access
R/W
Name
B3ENC
Description
Reserved
Connects Buck 3 enable to SYS_EN or PWR_EN Logic Control pin
0 - Buck 3 enable connected to PWR_EN
1 - Buck 3 enable connected to SYS_EN, Default
Connects Buck 2 enable to SYS_EN or PWR_EN Logic Control pin
0 - Buck 2 enable connected to PWR_EN
1 - Buck 2 enable connected to SYS_EN, Default
Connects Buck 1 enable to SYS_EN or PWR_EN Logic Control pin
0 - Buck 1 enable connected to PWR_EN, Default
1 - Buck 1 enable connected to SYS_EN
Connects LDO5 enable to SYS_EN or PWR_EN Logic Control pin
0 - LDO 5 enable connected to PWR_EN, Default
1 - LDO 5 enable connected to SYS_EN
Connects LDO4 enable to SYS_EN or PWR_EN Logic Control pin
0 - LDO 4 enable connected to PWR_EN
1 - LDO 4 enable connected to SYS_EN, Default
Connects LDO3 enable to SYS_EN or PWR_EN Logic Control pin
0 - LDO 3 enable connected to PWR_EN
1 - LDO 3 enable connected to SYS_EN, Default
Connects LDO2 enable to SYS_EN or PWR_EN Logic Control pin
0 - LDO 2 enable connected to PWR_EN
1 - LDO 2 enable connected to SYS_EN, Default
5
R/W
B2ENC
4
R/W
B1ENC
3
R/W
L5EC
2
R/W
L4EC
1
R/W
L3EC
0
R/W
L2EC
L
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參數(shù)描述
LP3972_08 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Power Management Unit for Advanced Application Processors
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