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參數(shù)資料
| 型號： | L6701TR |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | 3 Phase Controller for VR10, VR9 and K8 CPUs |
| 中文描述： | 3 VR10，VR9和K8處理器相控制器 |
| 文件頁數(shù)： | 5/44頁 |
| 文件大小： | 492K |
| 代理商： | L6701TR |
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L6701
2 Pins description and connection diagrams
5/44
2
Pins description and connection diagrams
Figure 1.
Pins connection (Top view)
2.1
Pin description
Table 1.
Pins description
Pin n
°
Name
Function
1
SGND
All the internal references are referred to this pin. Connect to the PCB Signal
Ground.
2
VCC
Device Power Supply and LS driver supply.
Operative voltage is 12V ±15%. Filter with at least 1
μ
F MLCC vs. ground.
3
LGATE1
Channel 1 LS Driver Output.
A small series resistor helps in reducing device-dissipated power.
4
PGND
LS Drivers return path. Connect to Power ground Plane.
5
LGATE2
Channel 2 LS Driver Output.
A small series resistor helps in reducing device-dissipated power.
6
LGATE3
Channel 3 LS Driver Output.
A small series resistor helps in reducing device-dissipated power.
7
BOOT1
Channel 1 HS driver supply.
Connect through a capacitor (100nF typ.) to PHASE1 and provide necessary
Bootstrap diode.
A small series resistor upstream the boot diode helps in reducing Boot capacitor
overcharge.
8
UGATE1
Channel 1 HS driver output.
A small series resistors helps in reducing device-dissipated power.
9
PHASE1
Channel 1 HS driver return path.
It must be connected to the HS1 MOSFET source and provides return path for
the HS driver of channel 1.
21
22
23
24
25
26
27
28
29
30
31
32
1
2
3
4
5
6
7
8
9
10
11
12
VID0
VID1
VID5
FBR
FBG
ISEN3
ISEN2
ISEN1
CS+
CS-
VSEN
FB
COMP
PHASE2
BOOT3
UGATE2
BOOT2
PHASE1
UGATE1
BOOT1
LGATE3
LGATE2
PGND
LGATE1
VCC
SGND
19
20
VID4
REF_OUT
VID3
VID2
13
14
15
16
SSEND / PGOOD
DAC_SEL
PHASE3
UGATE3
17
18
OSC / EN / FAULT
REF_IN
33
34
35
36
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