參數(shù)資料
型號: L6701TR
廠商: 意法半導體
英文描述: 3 Phase Controller for VR10, VR9 and K8 CPUs
中文描述: 3 VR10,VR9和K8處理器相控制器
文件頁數(shù): 36/44頁
文件大小: 492K
代理商: L6701TR
15 System Control Loop Compensation
L6701
36/44
is the PWM transfer function where
V
OSC
is the oscillator ramp
amplitude and has a typical value of 3V.
Removing the dependence from the Error Amplifier gain, so assuming this gain high enough,
and with further simplifications, the control loop gain results:
The system Control Loop gain (See
Figure 18
) is designed in order to obtain a high DC gain to
minimize static error and to cross the 0dB axes with a constant -20dB/dec slope with the
desired crossover frequency
ω
T
. Neglecting the effect of Z
F
(s), the transfer function has one
zero and two poles; both the poles are fixed once the output filter is designed (LC filter
resonance
ω
LC
) and the zero (
ω
ESR
) is fixed by ESR and the Droop resistance.
Figure 18. Equivalent Control Loop Block Diagram (left) and Bode Diagram (right).
To obtain the desired shape an R
F
- C
F
series network is considered for the Z
F
(s)
implementation. A zero at
ω
F
= 1/R
F
C
F
is then introduced together with an integrator. This
integrator minimizes the static error while placing the zero
ω
F
in correspondence with the L-C
resonance assures a simple -20dB/dec shape of the gain.
In fact, considering the usual value for the output filter, the LC resonance results to be at
frequency lower than the above reported zero.
Compensation network can be simply designed placing
ω
F
=
ω
LC
and imposing the cross-over
frequency
ω
T
as desired obtaining (always considering that
ω
T
might be not higher than 1/10th
of the switching frequency F
SW
):
R
V
V
IN
3
R
DROOP
PWM
4
5
--
V
OSC
------------------
=
GLOOPs
( )
4
5
--
---------------------
( )
---------------
-------------------------------------------
+
RO
-------
+
1
ESR
+
(
)
+
s2
CO
L
3
----
s
RO
------------------
CO
ESR
CO
-------
+
+
1
+
+
------------------------------------------------------------------------------------------------------------------------------------------
=
Reference
FB
COMP
VSEN
FBR
FBG
64k
64k
64k
R
F
C
F
R
FB
DROOP
PWM
L / N
ESR
C
O
R
O
d V
OUT
V
OUT
V
OUT
Z
F
(s)
Z
FB
(s)
REMOTE BUFFER
I
D
dB
ω
Z
F
(s)
G
LOOP
(s)
K
ω
LC
=
ω
F
ω
ESR
ω
T
R
F
[dB]
R
F
----------------------------------
5
4
--
ω
T
ESR
+
(
)
-------------------------------------------------------
=
C
F
C
O
R
F
L
3
--
-------------------
=
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