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參數(shù)資料
| 型號： | L6701TR |
| 廠商： | 意法半導體 |
| 英文描述： | 3 Phase Controller for VR10, VR9 and K8 CPUs |
| 中文描述： | 3 VR10，VR9和K8處理器相控制器 |
| 文件頁數(shù)： | 29/44頁 |
| 文件大?。?/td> | 492K |
| 代理商： | L6701TR |
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L6701
13 Output voltage Monitor and Protections
29/44
13
Output voltage Monitor and Protections
L6701 monitors through pin VSEN the regulated voltage in order to manage the OVP, UVP and
PGOOD (when applicable) conditions. Protections are active also during soft-start (See
Section 12
for details) while are masked during D-VID transitions with an additional 32 clock
cycle delay after the transition has finished to avoid false triggering.
In addition, preliminary over-voltage protection is also provided to protect the load from high-
side MOSFET failures before the system turn-ON.
13.1 Under Voltage
If the output voltage monitored by VSEN drops more than -400mV below the programmed
reference for more than one clock period, the device turns off all MOSFETs driving high the
FAULT pin and latches the condition: to recover it is required to cycle Vcc or the EN pin. This is
independent by the selected operative mode.
13.2 Preliminary Over Voltage
To provide a protection while VCC is below the UVLO
VCC
threshold is fundamental to avoid
damage to the load in case of failed HS MOSFETs. In fact, since the device is supplied from the
12V bus, it is basically “blind” for any voltage below the turn-on threshold (UVLO
VCC
). In order
to give full protection to the load, a preliminary-OVP protection is provided while VCC is within
UVLO
VCC
and UVLO
OVP
.
According to the DAC_SEL pin status, this protection turns-on the low side MOSFETs as long
as the FBR pin voltage is greater than 1.9V for VR10 and 2.1V for VR9 and K8 with a 300mV
hysteresis (See
Table 10
). When set, the protection drives the LS MOSFET with a gate-to-
source voltage depending on the voltage applied to VCC. This protection depends also on the
EN pin status as detailed in
Figure 13
. Preliminary OVP is always active before UVLO
VCC
for
all operative modes with intervention thresholds dependent on the DAC_SEL pin status.
A simple way to provide protection to the output in all conditions when the system is OFF (then
avoiding the unprotected red region in
Figure 13
-Left) consists in supplying the controller
through the 5VSB bus with an OR-ing diode solution as shown in
Figure 13
-Right: 5VSB is
always present before +12V and, in case of HS short, the LS MOSFET is driven with 5V
assuring a reliable protection of the load.
When using the OR-ing diode solution, OR-ing diodes need to be sized according to the device
current consumption: the two diodes will then results to be different since the diode connected
to the 12V bus needs to carry the current for normal operations (I
RMS
) and the diode connected
to the 5V
SB
(I
RMS-PREOVP
) need to carry only the current in case of Pre-OVP protection is
active. Device current consumption (I
RMS
) in normal operations depends on the external
MOSFET configuration as follow:
Device current consumption when Pre-OVP is active depends on the output filter configuration
since LS MOSFETs switching frequency depends on the leakage that is charging the output
filter. Test on the bench is required but, for an over-sized solution, the same diode identified for
the +12V bus can be used.
I
RMS
3 F
SW
Q
GHS
Q
GLS
+
(
)
I
CC
3 I
CCDRx
3 I
BOOTx
+
+
(
)
+
=
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