參數(shù)資料
型號(hào)： KSZ8842-16MVL-EVAL
廠商： Micrel Inc
文件頁數(shù)： 49/141頁
文件大小： 0K
描述： BOARD EVALUATION KSZ8842-16MVL
標(biāo)準(zhǔn)包裝： 1
主要目的： 接口，以太網(wǎng)控制器（PHY 和 MAC）
嵌入式： 否
已用 IC / 零件： KSZ8842-16MVL
主要屬性： 2 個(gè)端口，100BASE-TX/10BASE-T
次要屬性： 8/16 位接口，LinkMD 線纜診斷
已供物品： 板
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其它名稱： 576-1635
Micrel, Inc.
KSZ8842-16/32 MQL/MVL/MVLI/MBL
October 2007
15
M9999-102207-1.9
Pin Number
Pin Name
Type
Pin Function
27
P1LED3
Opd
Port 1 LED indicator
See the description in pins 3, 4, and 5.
28
EEDO
Opd
EEPROM Data Out
This pin is connected to DI input of the serial EEPROM.
29
EESK
Opd
EEPROM Serial Clock
A 4
s (OBCR[1:0]=11 on-chip bus speed @ 25 MHz) or 800 ns (OBCR[1:0]=00
on-chip bus speed @ 125 MHz) serial output clock cycle to load configuration
data from the serial EEPROM.
30
EEDI
Ipd
EEPROM Data In
This pin is connected to DO output of the serial EEPROM when EEEN is pull-up.
This pin can be pull-down for 8-bit bus mode, pull-up for 16-bit bus mode or don’t
care for 32-bit bus mode when EEEN is pull-down (without EEPROM).
31
SWR
Ipd
Synchronous Write/Read
Write/Read signal for synchronous bus accesses. Write cycles when high and
Read cycles when low.
32
AEN
Ipu
Address Enable
Address qualifier for the address decoding, active Low.
33
WRN
Ipd
Write Strobe Not
Asynchronous write strobe, active Low.
34
DGND
Gnd
Digital IO ground
35
ADSN
Ipd
Address Strobe Not
For systems that require address latching, the rising edge of ADSN indicates the
latching moment of A15-A1 and AEN.
36
PWRDN
Ipu
Full-chip power-down. Low = Power down; High or floating = Normal operation.
37
AGND
Gnd
Analog ground
38
VDDA
P
1.2V analog VDD input power supply from VDDCO (pin24) through external
Ferrite bead and capacitor.
39
AGND
Gnd
Analog ground
40
NC
—
No connect
41
NC
—
No connect
42
AGND
Gnd
Analog ground
43
VDDA
P
1.2V analog VDD input power supply from VDDCO (pin24) through external
Ferrite bead and capacitor.
44
NC
—
No connect
45
RXP1
I/O
Port 1 physical receive (MDI) or transmit (MDIX) signal (+ differential)
46
RXM1
I/O
Port 1 physical receive (MDI) or transmit (MDIX) signal (– differential)
47
AGND
Gnd
Analog ground
48
TXP1
I/O
Port 1 physical transmit (MDI) or receive (MDIX) signal (+ differential)
49
TXM1
I/O
Port 1 physical transmit (MDI) or receive (MDIX) signal (– differential)
50
VDDATX
P
3.3V analog VDD input power supply with well decoupling capacitors.
51
VDDARX
P
3.3V analog VDD input power supply with well decoupling capacitors.
52
RXM2
I/O
Port 2 physical receive (MDI) or transmit (MDIX) signal (- differential)
53
RXP2
I/O
Port 2 physical receive (MDI)or transmit (MDIX) signal (+ differential)
54
AGND
Gnd
Analog ground
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