參數資料
型號: KSZ8842-16MVL-EVAL
廠商: Micrel Inc
文件頁數: 101/141頁
文件大?。?/td> 0K
描述: BOARD EVALUATION KSZ8842-16MVL
標準包裝: 1
主要目的: 接口,以太網控制器(PHY 和 MAC)
嵌入式:
已用 IC / 零件: KSZ8842-16MVL
主要屬性: 2 個端口,100BASE-TX/10BASE-T
次要屬性: 8/16 位接口,LinkMD 線纜診斷
已供物品:
相關產品: 576-3270-ND - IC SWITCH ETH 2P 32BIT 128LQFP
576-3076-ND - IC MAC CTLR 2PORT ETH 100-LFBGA
KSZ8842-32MVL-ND - IC ETHERNET SW 2PORT BUS 128LQFP
576-2120-ND - IC ETHERNET SW 2PORT BUS 128LQFP
576-2119-ND - IC ETHERNET SW 2PORT BUS 128LQFP
其它名稱: 576-1635
Micrel, Inc.
KSZ8842-16/32 MQL/MVL/MVLI/MBL
October 2007
62
M9999-102207-1.9
Bank 1: Reserved
Except Bank Select Register (0xE).
Bank 2 Host MAC Address Register Low (0x00): MARL
This register along with the other two Host MAC address registers are loaded starting at word location 0x1 of the
EEPROM upon hardware reset. The software driver can modify the register, but it will not modify the original Host MAC
address value in the EEPROM. These six bytes of Host MAC address in external EEPROM are loaded to these three
registers as mapping below:
MARL[15:0] = EEPROM 0x1(MAC Byte 2 and 1)
MARM[15:0] = EEPROM 0x2(MAC Byte 4 and 3)
MARH[15:0] = EEPROM 0x3(MAC Byte 6 and 5)
The Host MAC address is used to define the individual destination address that the KSZ8842M responds to when
receiving frames. Network addresses are generally expressed in the form of 01:23:45:67:89:AB, where the bytes are
received from left to right, and the bits within each byte are received from right to left (LSB to MSB). For example, the
actual transmitted and received bits are on the order of 10000000 11000100 10100010 11100110 10010001 11010101.
These three registers value for Host MAC address 01:23:45:67:89:AB will be held as below:
MARL[15:0] = 0x89AB
MARM[15:0] = 0x4567
MARH[15:0] = 0x0123
The following table shows the register bit fields.
Bit
Default Value
R/W
Description
15-0
-
RW
MARL MAC Address Low
The least significant word of the MAC address.
Bank 2 Host MAC Address Register Middle (0x02): MARM
The middle word of Host MAC address.
The following table shows the register bit fields.
Bit
Default Value
R/W
Description
15-0
-
RW
MARM MAC Address Middle
The middle word of the MAC address.
Bank 2 Host MAC Address Register High (0x04): MARH
The high word of Host MAC address.
The following table shows the register bit fields.
Bit
Default Value
R/W
Description
15-0
-
RW
MARH MAC Address High
The Most significant word of the MAC address.
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