參數資料
型號: KAB03D100M-TNGP
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: Multi-Chip Package MEMORY
中文描述: 多芯片封裝存儲器
文件頁數: 51/72頁
文件大小: 1378K
代理商: KAB03D100M-TNGP
KAB0xD100M - TxGP
Revision 1.11
August 2003
- 51 -
MCP MEMORY
SEC Only
Alternate CE
R
Controlled Program Operations
NOR Flash SWITCHING WAVEFORMS
NOTES:
1. DQ7 is the output of the complement of the data written to the device.
2. DOUT is the output of the data written to the device.
3. PA : Program Address, PD : Program Data
4. The illustration shows the last two cycles of the program command sequence.
OE
Address
WE
DATA
CE
R
t
AH
t
AS
t
DS
t
DH
t
CP
t
OES
A0H
555H
PA
PA
Status
DOUT
Data Polling
t
CPH
t
WS
t
PGM
R/B
R
t
BUSY
t
RB
PD
t
WC
Parameter
Symbol
70ns
80ns
Unit
Min
Max
Min
Max
Write Cycle Time
t
WC
70
-
80
-
ns
Address Setup Time
t
AS
0
-
0
-
ns
Address Hold Time
t
AH
45
-
45
-
ns
Data Setup Time
t
DS
35
-
35
-
ns
Data Hold Time
t
DH
0
-
0
-
ns
OE Setup Time
t
OES
0
-
0
-
ns
WE Setup Time
t
WS
0
-
0
-
ns
WE Hold Time
t
WH
0
-
0
-
ns
CE
R
Pulse Width
t
CP
35
-
35
-
ns
CE
R
Pulse Width High
t
CPH
25
-
25
-
ns
Programming Operation
Word
t
PGM
14(typ.)
14(typ.)
μ
s
μ
s
μ
s
μ
s
Byte
9(typ.)
9(typ.)
Accelerated Programming Operation
Word
t
ACCPGM
9(typ.)
9(typ.)
Byte
7(typ.)
7(typ.)
Program/Erase Valide to R/B
R
Delay
t
BUSY
90
-
90
-
ns
Recovery Time from R/B
R
t
RB
0
-
0
-
ns
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