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參數(shù)資料
| 型號(hào)： | KAB03D100M-TNGP |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | Multi-Chip Package MEMORY |
| 中文描述： | 多芯片封裝存儲(chǔ)器 |
| 文件頁數(shù)： | 38/72頁 |
| 文件大?。?/td> | 1378K |
| 代理商： | KAB03D100M-TNGP |
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KAB0xD100M - TxGP
Revision 1.11
August 2003
- 38 -
MCP MEMORY
SEC Only
Identifying Invalid Block(s)
All device locations are erased(FFh) except locations where the invalid block(s) information is written prior to shipping. The invalid
block(s) status is defined by the 1st and 6th word in the spare area. Samsung makes sure that either 1st and 2nd page of every
invalid block has non-FFFFh data at the column address of 256 and 261. Since invalid block information is also erasable in most
cases, it is impossible to recover the information once it was erased. Therefore, system must be able to recognize the invalid block(s)
based on the original invalid block information and create invalid block table via the following suggested flow chart(Figure 22). Any
intentional erasure of the original invalid block information is prohibited.
Invalid Block(s)
Invalid blocks are defined as blocks that contain one or more invalid bits whose reliability is not guaranteed by Samsung. The infor-
mation regarding invalid block(s) is so called as the invalid block information. Devices ,regardless of having invalid block(s), have the
same quality level because all valid blocks have same AC and DC characteristics. An invalid block(s) does not affect the perfor-
mance of valid block(s) because it’s bit line and common source line is isolated by a select transistor. The system design must be
able to mask out invalid block(s) via address mapping. The 1st block, which is placed on 00h block address, is fully guaranteed to be
a valid block, does not require Error Correction.
*
Figure 22. Flow chart to create invalid block table
Start
Set Block Address = 0
Check "FFFFh"
Increment Block Address
Last Block
End
No
Yes
Yes
Create (or update)
Invalid Block(s) Table
No
Check "FFFFh" at the column address
256 and 261of the 1st and 2nd page
in the block
NAND Flash Technical Notes
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| KAB04D100M-TLGP | Multi-Chip Package MEMORY |
| KAB04D100M-TNGP | Multi-Chip Package MEMORY |
| KAB01D100M | Tantalum Conformal-Coated Capacitor; Capacitance: 22uF; Voltage: 10V; Packaging: Tape & Reel |
| KAB02D100M-TLGP | Tantalum Conformal-Coated Capacitor; Capacitance: 22uF; Voltage: 10V; Packaging: Tape & Reel |
| KAB01D100M-TNGP | CONNECTOR ACCESSORY |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| KAB04D100M-TLGP | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:Multi-Chip Package MEMORY |
| KAB04D100M-TNGP | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:Multi-Chip Package MEMORY |
| KAB-1 | 功能描述:保險(xiǎn)絲 TRON RECTIFIER FUSE RoHS:否 制造商:Littelfuse 產(chǎn)品:Surface Mount Fuses 電流額定值:0.5 A 電壓額定值:600 V 保險(xiǎn)絲類型:Fast Acting 保險(xiǎn)絲大小/組:Nano 尺寸:12.1 mm L x 4.5 mm W 安裝風(fēng)格: 端接類型:SMD/SMT 系列:485 |
| KAB-1/2 | 制造商:COOPER BUSSMANN 功能描述:TRON RECTIFIER FUSE |
| KAB-10 | 功能描述:保險(xiǎn)絲 10A RoHS:否 制造商:Littelfuse 產(chǎn)品:Surface Mount Fuses 電流額定值:0.5 A 電壓額定值:600 V 保險(xiǎn)絲類型:Fast Acting 保險(xiǎn)絲大小/組:Nano 尺寸:12.1 mm L x 4.5 mm W 安裝風(fēng)格: 端接類型:SMD/SMT 系列:485 |
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