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參數(shù)資料
| 型號(hào)： | K9K2G08U0A |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | TV 8C 8#16 PIN WALL RECP |
| 中文描述： | 256M × 8位NAND閃存 |
| 文件頁數(shù)： | 6/34頁 |
| 文件大小： | 850K |
| 代理商： | K9K2G08U0A |
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FLASH MEMORY
6
K9K2G08U0A
Preliminary
Product Introduction
The K9K2G08U0A is a 2112Mbit(2,214,592,512 bit) memory organized as 131,072 rows(pages) by 2112x8 columns. Spare 64 col-
umns are located from column address of 2048~2111. A 2112-byte data register and a 2112-byte cache register are serially con-
nected to each other. Those serially connected registers are connected to memory cell arrays for accommodating data transfer
between the I/O buffers and memory cells during page read and page program operations. The memory array is made up of 32 cells
that are serially connected to form a NAND structure. Each of the 32 cells resides in a different page. A block consists of two NAND
structures. A NAND structure consists of 32 cells. Total 135168 NAND cells reside in a block. The program and read operations are
executed on a page basis, while the erase operation is executed on a block basis. The memory array consists of 2048 separately
erasable 128K-byte blocks. It indicates that the bit by bit erase operation is prohibited on the K9K2G08U0A.
The K9K2G08U0A has addresses multiplexed into 8 I/Os. This scheme dramatically reduces pin counts and allows system upgrades
to future densities by maintaining consistency in system board design. Command, address and data are all written through I/O's by
bringing WE to low while CE is low. Those are latched on the rising edge of WE. Command Latch Enable(CLE) and Address Latch
Enable(ALE) are used to multiplex command and address respectively, via the I/O pins. Some commands require one bus cycle. For
example, Reset Command, Status Read Command, etc require just one cycle bus. Some other commands, like page read and block
erase and page program, require two cycles: one cycle for setup and the other cycle for execution. The 256M byte physical space
requires 29 addresses, thereby requiring five cycles for addressing: 2 cycles of column address, 3 cycles of row address, in that order.
Page Read and Page Program need the same five address cycles following the required command input. In Block Erase operation,
however, only the three row address cycles are used. Device operations are selected by writing specific commands into the command
register. Table 1 defines the specific commands of the K9K2G08U0A.
The device provides cache program in a block. It is possible to write data into the cache registers while data stored in data registers
are being programmed into memory cells in cache program mode. The program performace may be dramatically improved by cache
program when there are lots of pages of data to be programmed.
In addition to the enhanced architecture and interface, the device incorporates copy-back program feature from one page to another
page without need for transporting the data to and from the external buffer memory. Since the time-consuming serial access and
data-input cycles are removed, system performance for solid-state disk application is significantly increased.
Table 1. Command Sets
NOTE
: 1. Random Data Input/Output can be executed in a page.
Caution
: Any undefined command inputs are prohibited except for above command set of Table 1.
Function
1st. Cycle
2nd. Cycle
Acceptable Command during Busy
Read
00h
30h
Read for Copy Back
00h
35h
Read ID
90h
-
Reset
FFh
-
O
Page Program
80h
10h
Cache Program
*2
80h
15h
Copy-Back Program
85h
10h
Block Erase
60h
D0h
Random Data Input
*1
85h
-
Random Data Output
*1
05h
E0h
Read Status
70h
O
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| K9K2G08U0M | 256M x 8 Bit / 128M x 16 Bit NAND Flash Memory |
| K9XXG08UXM-E | SSR H/S ZS 600V 50A 4-32VDC |
| K9XXG08UXM-K | 256M x 8 Bit / 128M x 16 Bit NAND Flash Memory |
| K9XXG08UXM-P | SSR H/S ZS 600V 70A 4-32VDC |
| K9XXG08UXM-Y | 256M x 8 Bit / 128M x 16 Bit NAND Flash Memory |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| K9K2G08U0A-F | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:FLASH MEMORY |
| K9K2G08U0M | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:256M x 8 Bit / 128M x 16 Bit NAND Flash Memory |
| K9K2G08U0M-F | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:256M x 8 Bit / 128M x 16 Bit NAND Flash Memory |
| K9K2G08U0M-FCB0 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:256M x 8 Bit / 128M x 16 Bit NAND Flash Memory |
| K9K2G08U0M-FIB0 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:256M x 8 Bit / 128M x 16 Bit NAND Flash Memory |
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