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| 型號： | ISLA118P50IRZ |
| 廠商： | Intersil |
| 文件頁數(shù)： | 20/34頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 8BIT SPI/SRL 500M 72QFN |
| 產(chǎn)品培訓模塊： | Solutions for Test and Measurement Equipment |
| 標準包裝： | 1 |
| 系列： | FemtoCharge™ |
| 位數(shù)： | 8 |
| 采樣率（每秒）： | 500M |
| 數(shù)據(jù)接口： | 串行，SPI? |
| 轉換器數(shù)目： | 2 |
| 功率耗散（最大）： | 477mW |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 72-VFQFN 裸露焊盤 |
| 供應商設備封裝： | 72-QFN（10x10） |
| 包裝： | 托盤 |
| 輸入數(shù)目和類型： | 2 個單端，單極；1 個差分，單極 |
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ISLA118P50
27
FN7565.2
July 25, 2011
Device Test
The ISLA118P50 can produce preset or user defined patterns on
the digital outputs to facilitate in-situ testing. A static word can
be placed on the output bus, or two different words can alternate.
In the alternate mode, the values defined as Word 1 and Word 2
(as shown in Table 14) are set on the output bus on alternating
clock phases. The test mode is enabled asynchronously to the
sample clock, therefore several sample clock cycles may elapse
before the data is present on the output bus.
ADDRESS 0XC0: TEST_IO
Bits 7:6 User Test Mode
These bits set the test mode to static (0x00) or alternate
(0x01) mode. Other values are reserved.
The four LSBs in this register (Output Test Mode) determine the
test pattern in combination with registers 0xC2 through 0xC5.
Refer to “SPI Memory Map” on page 28.
ADDRESS 0XC2: USER_PATT1_LSB
ADDRESS 0XC3: USER_PATT1_MSB
These registers define the lower and upper eight bits,
respectively, of the first user-defined test word.
ADDRESS 0XC4: USER_PATT2_LSB
ADDRESS 0XC5: USER_PATT2_MSB
These registers define the lower and upper eight bits,
respectively, of the second user-defined test word.
Digital Temperature Sensor
This set of registers provides digital access to an IPTAT-based
temperature sensor, allowing the system to estimate the
temperature of the die. This information is of particular interest
for applications that do not keep I2E in Active Run state when in
normal use, allowing easy access to information that can be
used to decide when to recalibrate the A/D as needed. This set of
registers is not included in the SPI memory map table.
The most accurate usage of this information requires knowledge
of the temperature at which the digital value is first read
(time = 0, T(0) = degrees C at time = 0, and register_value(0) = the
digital value of the temperature registers at time = 0). Any future
reading of the registers indicates temperature change according
to Equation 4:
A less accurate method for evaluating the temperature change
does not require knowledge of the temperature at time = 0, and
is given by Equation 5:
The digital temperature sensor is a weak function of the AVDD
supply voltage, so to achieve best accuracy the AVDD supply
voltage should be held fairly constant across the operating
temperature range.
The algorithm to access this set of registers is as follows:
1. Write the value 0x80 to the Index Register (SPI address 0x10).
2. Write the value 0x88 to SPI address 0x120 to turn the
temperature sensor on.
3. Read the register_value LSBs at SPI register 0x11E.
4. Read the register_value MSBs at SPI register 0x11F.
5. Write the value 0x60 to SPI address 0x120 to turn the
temperature sensor off.
TABLE 14. OUTPUT TEST MODES
VALUE
0xC0[3:0]
OUTPUT TEST MODE
WORD 1
WORD 2
0000
Off
0001
Midscale
0x8000
N/A
0010
Positive Full-Scale
0xFFFF
N/A
0011
Negative Full-Scale
0x0000
N/A
0100
Checkerboard
0xAAAA
0x5555
0101
Reserved
N/A
0110
Reserved
N/A
0111
One/Zero
0xFFFF
0x0000
1000
User Pattern
user_patt1
user_patt2
ΔTT 1
() T0
()
register_value(1)
[]
register_value(0)
[]
–
T0
() 216
–
() 256
[]
-------------------------------------------------------------------------------------------------------------
=
–
=
(EQ. 4)
ΔTT 1
() T0
()
register_value(1)
[]
register_value(0)
[]
–
-0.72
()
-------------------------------------------------------------------------------------------------------------
=
–
=
(EQ. 5)
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